Fix memory leak in the stackifier, due to the machinebasicblocks not holding

[oota-llvm.git] / lib / Target / X86 / FloatingPoint.cpp

diff --git a/lib/Target/X86/FloatingPoint.cpp b/lib/Target/X86/FloatingPoint.cpp
index 23d4e17f8e11659831300616d2099c0d0208fb66..b89347699653bd058ad59fd80657823644d58c72 100644 (file)
--- a/lib/Target/X86/FloatingPoint.cpp
+++ b/lib/Target/X86/FloatingPoint.cpp
@@ -1,4 +1,11 @@
 //===-- FloatingPoint.cpp - Floating point Reg -> Stack converter ---------===//
+// 
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// 
+//===----------------------------------------------------------------------===//
 //
 // This file defines the pass which converts floating point instructions from
 // virtual registers into register stack instructions.
@@ -11,12 +18,14 @@
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/LiveVariables.h"
+#include "llvm/CodeGen/Passes.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "Support/Debug.h"
 #include "Support/Statistic.h"
 #include <algorithm>
 #include <iostream>
+using namespace llvm;
 
 namespace {
   Statistic<> NumFXCH("x86-codegen", "Number of fxch instructions inserted");
@@ -63,7 +72,7 @@ namespace {
     // getSTReg - Return the X86::ST(i) register which contains the specified
     // FP<RegNo> register
     unsigned getSTReg(unsigned RegNo) const {
-      return StackTop - 1 - getSlot(RegNo) + X86::ST0;
+      return StackTop - 1 - getSlot(RegNo) + llvm::X86::ST0;
     }
 
     // pushReg - Push the specifiex FP<n> register onto the stack
@@ -117,7 +126,7 @@ namespace {
   };
 }
 
-FunctionPass *createX86FloatingPointStackifierPass() { return new FPS(); }
+FunctionPass *llvm::createX86FloatingPointStackifierPass() { return new FPS(); }
 
 /// runOnMachineFunction - Loop over all of the basic blocks, transforming FP
 /// register references into FP stack references.
@@ -216,12 +225,14 @@ bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) {
 // Efficient Lookup Table Support
 //===----------------------------------------------------------------------===//
 
-struct TableEntry {
-  unsigned from;
-  unsigned to;
-  bool operator<(const TableEntry &TE) const { return from < TE.from; }
-  bool operator<(unsigned V) const { return from < V; }
-};
+namespace {
+  struct TableEntry {
+    unsigned from;
+    unsigned to;
+    bool operator<(const TableEntry &TE) const { return from < TE.from; }
+    bool operator<(unsigned V) const { return from < V; }
+  };
+}
 
 static bool TableIsSorted(const TableEntry *Table, unsigned NumEntries) {
   for (unsigned i = 0; i != NumEntries-1; ++i)
@@ -590,4 +601,57 @@ void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) {
   }
 
   I = MBB->erase(I)-1;  // Remove the pseudo instruction
+  delete MI;
+}
+
+namespace {
+  struct FPK : public MachineFunctionPass {
+    virtual const char *getPassName() const { return "X86 FP Killer"; }
+    virtual bool runOnMachineFunction(MachineFunction &MF);
+      virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+          AU.addPreserved<LiveVariables>();
+          AU.addRequired<LiveVariables>();
+          AU.addPreservedID(PHIEliminationID);
+          AU.addRequiredID(PHIEliminationID);
+          MachineFunctionPass::getAnalysisUsage(AU);
+      }
+  };
+}
+
+FunctionPass *llvm::createX86FloatingPointKillerPass() { return new FPK(); }
+
+bool FPK::runOnMachineFunction(MachineFunction &MF) {
+  const TargetInstrInfo& tii = MF.getTarget().getInstrInfo();;
+  LiveVariables &LV = getAnalysis<LiveVariables>();
+
+  for (MachineFunction::iterator
+           mbbi = MF.begin(), mbbe = MF.end(); mbbi != mbbe; ++mbbi) {
+    MachineBasicBlock& mbb = *mbbi;
+    MachineBasicBlock::reverse_iterator mii = mbb.rbegin();
+    // rewind to the last non terminating instruction
+    while (mii != mbb.rend() && tii.isTerminatorInstr((*mii)->getOpcode()))
+      ++mii;
+
+    // add implicit def for all virtual floating point registers so that
+    // they are spilled at the end of each basic block, since our
+    // register stackifier doesn't handle them otherwise.
+    MachineInstr* instr = BuildMI(X86::IMPLICIT_DEF, 7)
+        .addReg(X86::FP6, MOTy::Def)
+        .addReg(X86::FP5, MOTy::Def)
+        .addReg(X86::FP4, MOTy::Def)
+        .addReg(X86::FP3, MOTy::Def)
+        .addReg(X86::FP2, MOTy::Def)
+        .addReg(X86::FP1, MOTy::Def)
+        .addReg(X86::FP0, MOTy::Def);
+        
+    mbb.insert(mii.base(), instr);
+
+    for (unsigned i = 0; i < instr->getNumOperands(); ++i) {
+      LV.HandlePhysRegDef(instr->getOperand(i).getAllocatedRegNum(), instr);
+
+      // force live variables to compute that these registers are dead
+      LV.HandlePhysRegDef(instr->getOperand(i).getAllocatedRegNum(), 0);
+    }
+  }
+  return true;
 }