implement smull and umull

[oota-llvm.git] / lib / Target / TargetSelectionDAG.td

diff --git a/lib/Target/TargetSelectionDAG.td b/lib/Target/TargetSelectionDAG.td
index 6e9a695a93d997987a0fc6b21d4feb24a0772cfd..bb67cbfbeffcfd6995ba854e270e53b27a5de09c 100644 (file)
--- a/lib/Target/TargetSelectionDAG.td
+++ b/lib/Target/TargetSelectionDAG.td
@@ -164,10 +164,6 @@ def SDTStore : SDTypeProfile<0, 2, [ // store
   SDTCisPtrTy<1>  
 ]>;
 
-def SDTTruncStore : SDTypeProfile<0, 4, [  // truncstore
-  SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>, SDTCisVT<3, OtherVT>
-]>;
-
 def SDTVecShuffle : SDTypeProfile<1, 3, [
   SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>, SDTCisIntVectorOfSameSize<3, 0>
 ]>;
@@ -299,11 +295,10 @@ def brind      : SDNode<"ISD::BRIND"      , SDTBrind,  [SDNPHasChain]>;
 def br         : SDNode<"ISD::BR"         , SDTBr,     [SDNPHasChain]>;
 def ret        : SDNode<"ISD::RET"        , SDTRet,    [SDNPHasChain]>;
 
-// Do not use ld directly. Use load, extload, sextload, zextload (see below).
+// Do not use ld, st directly. Use load, extload, sextload, zextload, store,
+// and truncst (see below).
 def ld         : SDNode<"ISD::LOAD"       , SDTLoad,  [SDNPHasChain]>;
-def store      : SDNode<"ISD::STORE"      , SDTStore, [SDNPHasChain]>;
-
-def truncst    : SDNode<"ISD::TRUNCSTORE" , SDTTruncStore, [SDNPHasChain]>;
+def st         : SDNode<"ISD::STORE"      , SDTStore, [SDNPHasChain]>;
 
 def vector_shuffle : SDNode<"ISD::VECTOR_SHUFFLE", SDTVecShuffle, []>;
 def build_vector : SDNode<"ISD::BUILD_VECTOR", SDTypeProfile<1, 0, []>, []>;
@@ -408,78 +403,111 @@ def load : PatFrag<(ops node:$ptr), (ld node:$ptr), [{
   return ISD::isNON_EXTLoad(N);
 }]>;
 
-// extending load & truncstore fragments.
+// extending load fragments.
 def extloadi1  : PatFrag<(ops node:$ptr), (ld node:$ptr), [{
   if (ISD::isEXTLoad(N))
-    return cast<LoadSDNode>(N)->getLoadVT() == MVT::i1;
+    return cast<LoadSDNode>(N)->getLoadedVT() == MVT::i1;
   return false;
 }]>;
 def extloadi8  : PatFrag<(ops node:$ptr), (ld node:$ptr), [{
   if (ISD::isEXTLoad(N))
-    return cast<LoadSDNode>(N)->getLoadVT() == MVT::i8;
+    return cast<LoadSDNode>(N)->getLoadedVT() == MVT::i8;
   return false;
 }]>;
 def extloadi16 : PatFrag<(ops node:$ptr), (ld node:$ptr), [{
   if (ISD::isEXTLoad(N))
-    return cast<LoadSDNode>(N)->getLoadVT() == MVT::i16;
+    return cast<LoadSDNode>(N)->getLoadedVT() == MVT::i16;
   return false;
 }]>;
 def extloadi32 : PatFrag<(ops node:$ptr), (ld node:$ptr), [{
   if (ISD::isEXTLoad(N))
-    return cast<LoadSDNode>(N)->getLoadVT() == MVT::i32;
+    return cast<LoadSDNode>(N)->getLoadedVT() == MVT::i32;
   return false;
 }]>;
 def extloadf32 : PatFrag<(ops node:$ptr), (ld node:$ptr), [{
   if (ISD::isEXTLoad(N))
-    return cast<LoadSDNode>(N)->getLoadVT() == MVT::f32;
+    return cast<LoadSDNode>(N)->getLoadedVT() == MVT::f32;
   return false;
 }]>;
 
 def sextloadi1 : PatFrag<(ops node:$ptr), (ld node:$ptr), [{
   if (ISD::isSEXTLoad(N))
-    return cast<LoadSDNode>(N)->getLoadVT() == MVT::i1;
+    return cast<LoadSDNode>(N)->getLoadedVT() == MVT::i1;
   return false;
 }]>;
 def sextloadi8 : PatFrag<(ops node:$ptr), (ld node:$ptr), [{
   if (ISD::isSEXTLoad(N))
-    return cast<LoadSDNode>(N)->getLoadVT() == MVT::i8;
+    return cast<LoadSDNode>(N)->getLoadedVT() == MVT::i8;
   return false;
 }]>;
 def sextloadi16 : PatFrag<(ops node:$ptr), (ld node:$ptr), [{
   if (ISD::isSEXTLoad(N))
-    return cast<LoadSDNode>(N)->getLoadVT() == MVT::i16;
+    return cast<LoadSDNode>(N)->getLoadedVT() == MVT::i16;
   return false;
 }]>;
 def sextloadi32 : PatFrag<(ops node:$ptr), (ld node:$ptr), [{
   if (ISD::isSEXTLoad(N))
-    return cast<LoadSDNode>(N)->getLoadVT() == MVT::i32;
+    return cast<LoadSDNode>(N)->getLoadedVT() == MVT::i32;
   return false;
 }]>;
 
 def zextloadi1 : PatFrag<(ops node:$ptr), (ld node:$ptr), [{
   if (ISD::isZEXTLoad(N))
-    return cast<LoadSDNode>(N)->getLoadVT() == MVT::i1;
+    return cast<LoadSDNode>(N)->getLoadedVT() == MVT::i1;
   return false;
 }]>;
 def zextloadi8 : PatFrag<(ops node:$ptr), (ld node:$ptr), [{
   if (ISD::isZEXTLoad(N))
-    return cast<LoadSDNode>(N)->getLoadVT() == MVT::i8;
+    return cast<LoadSDNode>(N)->getLoadedVT() == MVT::i8;
   return false;
 }]>;
 def zextloadi16 : PatFrag<(ops node:$ptr), (ld node:$ptr), [{
   if (ISD::isZEXTLoad(N))
-    return cast<LoadSDNode>(N)->getLoadVT() == MVT::i16;
+    return cast<LoadSDNode>(N)->getLoadedVT() == MVT::i16;
   return false;
 }]>;
 def zextloadi32 : PatFrag<(ops node:$ptr), (ld node:$ptr), [{
   if (ISD::isZEXTLoad(N))
-    return cast<LoadSDNode>(N)->getLoadVT() == MVT::i32;
+    return cast<LoadSDNode>(N)->getLoadedVT() == MVT::i32;
   return false;
 }]>;
 
-def truncstore    : PatFrag<(ops node:$val, node:$ptr, node:$vt),
-                            (truncst node:$val, node:$ptr, srcvalue:$dummy, 
-                            node:$vt)>;
+def store : PatFrag<(ops node:$val, node:$ptr),
+                    (st node:$val, node:$ptr), [{
+  return ISD::isNON_TRUNCStore(N);
+}]>;
+
+// truncstore fragments.
+def truncstorei1 : PatFrag<(ops node:$val, node:$ptr),
+                           (st node:$val, node:$ptr), [{
+  if (ISD::isTRUNCStore(N))
+    return cast<StoreSDNode>(N)->getStoredVT() == MVT::i1;
+  return false;
+}]>;
+def truncstorei8 : PatFrag<(ops node:$val, node:$ptr),
+                           (st node:$val, node:$ptr), [{
+  if (ISD::isTRUNCStore(N))
+    return cast<StoreSDNode>(N)->getStoredVT() == MVT::i8;
+  return false;
+}]>;
+def truncstorei16 : PatFrag<(ops node:$val, node:$ptr),
+                            (st node:$val, node:$ptr), [{
+  if (ISD::isTRUNCStore(N))
+    return cast<StoreSDNode>(N)->getStoredVT() == MVT::i16;
+  return false;
+}]>;
+def truncstorei32 : PatFrag<(ops node:$val, node:$ptr),
+                            (st node:$val, node:$ptr), [{
+  if (ISD::isTRUNCStore(N))
+    return cast<StoreSDNode>(N)->getStoredVT() == MVT::i32;
+  return false;
+}]>;
+def truncstoref32 : PatFrag<(ops node:$val, node:$ptr),
+                            (st node:$val, node:$ptr), [{
+  if (ISD::isTRUNCStore(N))
+    return cast<StoreSDNode>(N)->getStoredVT() == MVT::f32;
+  return false;
+}]>;
 
 // setcc convenience fragments.
 def setoeq : PatFrag<(ops node:$lhs, node:$rhs),
@@ -554,11 +582,13 @@ class Pat<dag pattern, dag result> : Pattern<pattern, [result]>;
 // RootNodes are the list of possible root nodes of the sub-dags to match.
 // e.g. X86 addressing mode - def addr : ComplexPattern<4, "SelectAddr", [add]>;
 //
-class ComplexPattern<ValueType ty, int numops, string fn, list<SDNode> roots = []> {
+class ComplexPattern<ValueType ty, int numops, string fn,
+                     list<SDNode> roots = [], list<SDNodeProperty> props = []> {
   ValueType Ty = ty;
   int NumOperands = numops;
   string SelectFunc = fn;
   list<SDNode> RootNodes = roots;
+  list<SDNodeProperty> Properties = props;
 }
 
 //===----------------------------------------------------------------------===//