#include "llvm/Target/TargetSchedInfo.h"
#include "llvm/Target/TargetMachine.h"
+namespace llvm {
+
resourceId_t MachineResource::nextId = 0;
// Check if fromRVec and toRVec have *any* common entries.
TargetSchedInfo::computeInstrResources(const std::vector<InstrRUsage>&
instrRUForClasses)
{
- int numOpCodes = mii->getNumRealOpCodes();
+ int numOpCodes = mii->getNumOpcodes();
instrRUsages.resize(numOpCodes);
// First get the resource usage information from the class resource usages.
TargetSchedInfo::computeIssueGaps(const std::vector<InstrRUsage>&
instrRUForClasses)
{
- int numOpCodes = mii->getNumRealOpCodes();
+ int numOpCodes = mii->getNumOpcodes();
issueGaps.resize(numOpCodes);
conflictLists.resize(numOpCodes);
assert(r >= 0 && "Resource to remove was unused in cycle c!");
}
}
+
+} // End llvm namespace