Direct declaration of namespace-ified globals does not work, must enclose

[oota-llvm.git] / lib / Target / TargetMachine.cpp

diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp
index 2d0d330d8db38c4e0259ea7a3ee11ab6264ae4e3..d71bd3f9542f0bdbf0f710297c0d7720ff37eb49 100644 (file)
--- a/lib/Target/TargetMachine.cpp
+++ b/lib/Target/TargetMachine.cpp
@@ -1,58 +1,63 @@
 //===-- TargetMachine.cpp - General Target Information ---------------------==//
+// 
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// 
+//===----------------------------------------------------------------------===//
 //
 // This file describes the general parts of a Target machine.
-// This file also implements MachineCacheInfo.
 //
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/MachineCacheInfo.h"
 #include "llvm/Type.h"
+#include "llvm/CodeGen/IntrinsicLowering.h"
+#include "Support/CommandLine.h"
+using namespace llvm;
 
 //---------------------------------------------------------------------------
-// class TargetMachine
-// 
-// Purpose:
-//   Machine description.
-// 
-//---------------------------------------------------------------------------
+// Command-line options that tend to be useful on more than one back-end.
+//
 
+namespace llvm {
+  bool PrintMachineCode;
+  bool NoFramePointerElim;
+};
+namespace {
+  cl::opt<bool, true> PrintCode("print-machineinstrs",
+    cl::desc("Print generated machine code"),
+    cl::location(PrintMachineCode), cl::init(false));
 
-// function TargetMachine::findOptimalStorageSize 
-// 
-// Purpose:
-//   This default implementation assumes that all sub-word data items use
-//   space equal to optSizeForSubWordData, and all other primitive data
-//   items use space according to the type.
-//   
-unsigned int
-TargetMachine::findOptimalStorageSize(const Type* ty) const
-{
-  switch(ty->getPrimitiveID())
-    {
-    case Type::BoolTyID:
-    case Type::UByteTyID:
-    case Type::SByteTyID:     
-    case Type::UShortTyID:
-    case Type::ShortTyID:     
-      return optSizeForSubWordData;
-    
-    default:
-      return DataLayout.getTypeSize(ty);
-    }
-}
-
+  cl::opt<bool, true> 
+    DisableFPElim("disable-fp-elim",
+                  cl::desc("Disable frame pointer elimination optimization"),
+                  cl::location(NoFramePointerElim),
+                  cl::init(false));
+};
 
 //---------------------------------------------------------------------------
-// class MachineCacheInfo 
-// 
-// Purpose:
-//   Describes properties of the target cache architecture.
-//---------------------------------------------------------------------------
+// TargetMachine Class
+//
+TargetMachine::TargetMachine(const std::string &name, IntrinsicLowering *il,
+                             bool LittleEndian,
+                             unsigned char PtrSize, unsigned char PtrAl,
+                             unsigned char DoubleAl, unsigned char FloatAl,
+                             unsigned char LongAl, unsigned char IntAl,
+                             unsigned char ShortAl, unsigned char ByteAl)
+  : Name(name), DataLayout(name, LittleEndian,
+                           PtrSize, PtrAl, DoubleAl, FloatAl, LongAl,
+                           IntAl, ShortAl, ByteAl) {
+  IL = il ? il : new DefaultIntrinsicLowering();
+}
+TargetMachine::TargetMachine(const std::string &name, IntrinsicLowering *il,
+                             const Module &M)
+  : Name(name), DataLayout(name, &M) {
+  IL = il ? il : new DefaultIntrinsicLowering();
+}
 
-void MachineCacheInfo::Initialize() {
-  numLevels = 2;
-  cacheLineSizes.push_back(16);  cacheLineSizes.push_back(32); 
-  cacheSizes.push_back(1 << 15); cacheSizes.push_back(1 << 20);
-  cacheAssoc.push_back(1);       cacheAssoc.push_back(4);
+TargetMachine::~TargetMachine() {
+  delete IL;
 }
+