//===-- TargetMachine.cpp - General Target Information ---------------------==//
//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
// This file describes the general parts of a Target machine.
-// This file also implements MachineCacheInfo.
//
//===----------------------------------------------------------------------===//
#include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/MachineCacheInfo.h"
#include "llvm/Type.h"
+#include "llvm/CodeGen/IntrinsicLowering.h"
+#include "llvm/Support/CommandLine.h"
+using namespace llvm;
//---------------------------------------------------------------------------
-// class TargetMachine
-//
-// Purpose:
-// Machine description.
-//
-//---------------------------------------------------------------------------
+// Command-line options that tend to be useful on more than one back-end.
+//
+
+namespace llvm {
+ bool PrintMachineCode;
+ bool NoFramePointerElim;
+ bool NoExcessFPPrecision;
+ bool UnsafeFPMath;
+ bool PICEnabled;
+};
+namespace {
+ cl::opt<bool, true> PrintCode("print-machineinstrs",
+ cl::desc("Print generated machine code"),
+ cl::location(PrintMachineCode), cl::init(false));
+ cl::opt<bool, true>
+ DisableFPElim("disable-fp-elim",
+ cl::desc("Disable frame pointer elimination optimization"),
+ cl::location(NoFramePointerElim),
+ cl::init(false));
+ cl::opt<bool, true>
+ DisableExcessPrecision("disable-excess-fp-precision",
+ cl::desc("Disable optimizations that may increase FP precision"),
+ cl::location(NoExcessFPPrecision),
+ cl::init(false));
+ cl::opt<bool, true>
+ EnableUnsafeFPMath("enable-unsafe-fp-math",
+ cl::desc("Enable optimizations that may decrease FP precision"),
+ cl::location(UnsafeFPMath),
+ cl::init(false));
+ cl::opt<bool, true>
+ EnablePIC("enable-pic",
+ cl::desc("Enable generation of position independant code"),
+ cl::location(PICEnabled),
+ cl::init(false));
+};
-// function TargetMachine::findOptimalStorageSize
-//
-// Purpose:
-// This default implementation assumes that all sub-word data items use
-// space equal to optSizeForSubWordData, and all other primitive data
-// items use space according to the type.
-//
-unsigned TargetMachine::findOptimalStorageSize(const Type *Ty) const {
- // Round integral values smaller than SubWordDataSize up to SubWordDataSize
- if (Ty->isIntegral() &&
- Ty->getPrimitiveSize() < DataLayout.getSubWordDataSize())
- return DataLayout.getSubWordDataSize();
-
- return DataLayout.getTypeSize(Ty);
+//---------------------------------------------------------------------------
+// TargetMachine Class
+//
+TargetMachine::TargetMachine(const std::string &name, IntrinsicLowering *il,
+ bool LittleEndian,
+ unsigned char PtrSize, unsigned char PtrAl,
+ unsigned char DoubleAl, unsigned char FloatAl,
+ unsigned char LongAl, unsigned char IntAl,
+ unsigned char ShortAl, unsigned char ByteAl,
+ unsigned char BoolAl)
+ : Name(name), DataLayout(name, LittleEndian,
+ PtrSize, PtrAl, DoubleAl, FloatAl, LongAl,
+ IntAl, ShortAl, ByteAl, BoolAl) {
+ IL = il ? il : new DefaultIntrinsicLowering();
}
+TargetMachine::TargetMachine(const std::string &name, IntrinsicLowering *il,
+ const TargetData &TD)
+ : Name(name), DataLayout(TD) {
+ IL = il ? il : new DefaultIntrinsicLowering();
+}
-//---------------------------------------------------------------------------
-// class MachineCacheInfo
-//
-// Purpose:
-// Describes properties of the target cache architecture.
-//---------------------------------------------------------------------------
+TargetMachine::TargetMachine(const std::string &name, IntrinsicLowering *il,
+ const Module &M)
+ : Name(name), DataLayout(name, &M) {
+ IL = il ? il : new DefaultIntrinsicLowering();
+}
-void MachineCacheInfo::Initialize() {
- numLevels = 2;
- cacheLineSizes.push_back(16); cacheLineSizes.push_back(32);
- cacheSizes.push_back(1 << 15); cacheSizes.push_back(1 << 20);
- cacheAssoc.push_back(1); cacheAssoc.push_back(4);
+TargetMachine::~TargetMachine() {
+ delete IL;
}
+