Fix a couple of typo's.

[oota-llvm.git] / lib / Target / Target.td

diff --git a/lib/Target/Target.td b/lib/Target/Target.td
index 3e7665fd2e981f8fae29cf6a0130a6be93cf17c3..10d458eb8aa29cd320fed0676ee9f2badd42931a 100644 (file)
--- a/lib/Target/Target.td
+++ b/lib/Target/Target.td
@@ -147,6 +147,9 @@ class Instruction {
   // code.
   list<Predicate> Predicates = [];
 
+  // Code size.
+  int CodeSize = 0;
+
   // Added complexity passed onto matching pattern.
   int AddedComplexity  = 0;
 
@@ -168,6 +171,19 @@ class Instruction {
   bit noResults    = 0;     // Does this instruction produce no results?
   
   InstrItinClass Itinerary = NoItinerary;// Execution steps used for scheduling.
+
+  string Constraints = "";
+  
+  /// DisableEncoding - List of operand names (e.g. "$op1,$op2") that should not
+  /// be encoded into the output machineinstr.
+  string DisableEncoding = "";
+}
+
+/// Imp - Helper class for specifying the implicit uses/defs set for an
+/// instruction.
+class Imp<list<Register> uses, list<Register> defs> {
+  list<Register> Uses = uses;
+  list<Register> Defs = defs;
 }
 
 /// Predicates - These are extra conditionals which are turned into instruction
@@ -201,7 +217,6 @@ def ptr_rc;
 class Operand<ValueType ty> {
   ValueType Type = ty;
   string PrintMethod = "printOperand";
-  int NumMIOperands = 1;
   dag MIOperandInfo = (ops);
 }
 
@@ -211,6 +226,17 @@ def i16imm : Operand<i16>;
 def i32imm : Operand<i32>;
 def i64imm : Operand<i64>;
 
+
+/// PredicateOperand - This can be used to define a predicate operand for an
+/// instruction.  OpTypes specifies the MIOperandInfo for the operand, and
+/// AlwaysVal specifies the value of this predicate when set to "always
+/// execute".
+class PredicateOperand<dag OpTypes, dag AlwaysVal> : Operand<OtherVT> {
+  let MIOperandInfo = OpTypes;
+  dag ExecuteAlways = AlwaysVal;
+}
+
+
 // InstrInfo - This class should only be instantiated once to provide parameters
 // which are global to the the target machine.
 //