-//===- SystemZRegisterInfo.h - SystemZ Register Information Impl ----*- C++ -*-===//
+//===-- SystemZRegisterInfo.h - SystemZ register information ----*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
-//
-// This file contains the SystemZ implementation of the TargetRegisterInfo class.
-//
-//===----------------------------------------------------------------------===//
#ifndef SystemZREGISTERINFO_H
#define SystemZREGISTERINFO_H
+#include "SystemZ.h"
#include "llvm/Target/TargetRegisterInfo.h"
-#include "SystemZGenRegisterInfo.h.inc"
+
+#define GET_REGINFO_HEADER
+#include "SystemZGenRegisterInfo.inc"
namespace llvm {
namespace SystemZ {
- /// SubregIndex - The index of various sized subregister classes. Note that
- /// these indices must be kept in sync with the class indices in the
- /// SystemZRegisterInfo.td file.
- enum SubregIndex {
- SUBREG_32BIT = 1, SUBREG_EVEN = 1, SUBREG_ODD = 2
- };
+// Return the subreg to use for referring to the even and odd registers
+// in a GR128 pair. Is32Bit says whether we want a GR32 or GR64.
+inline unsigned even128(bool Is32bit) {
+ return Is32bit ? subreg_hl32 : subreg_h64;
+}
+inline unsigned odd128(bool Is32bit) {
+ return Is32bit ? subreg_l32 : subreg_l64;
}
+} // end namespace SystemZ
class SystemZSubtarget;
-class TargetInstrInfo;
-class Type;
+class SystemZInstrInfo;
struct SystemZRegisterInfo : public SystemZGenRegisterInfo {
+private:
SystemZTargetMachine &TM;
- const TargetInstrInfo &TII;
-
- SystemZRegisterInfo(SystemZTargetMachine &tm, const TargetInstrInfo &tii);
-
- /// Code Generation virtual methods...
- const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
-
- const TargetRegisterClass* const* getCalleeSavedRegClasses(
- const MachineFunction *MF = 0) const;
-
- BitVector getReservedRegs(const MachineFunction &MF) const;
-
- bool hasReservedCallFrame(MachineFunction &MF) const;
- bool hasFP(const MachineFunction &MF) const;
-
- int getFrameIndexOffset(MachineFunction &MF, int FI) const;
-
- void eliminateCallFramePseudoInstr(MachineFunction &MF,
- MachineBasicBlock &MBB,
- MachineBasicBlock::iterator I) const;
-
- void eliminateFrameIndex(MachineBasicBlock::iterator II,
- int SPAdj, RegScavenger *RS = NULL) const;
-
-
- void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
- RegScavenger *RS) const;
-
- void emitPrologue(MachineFunction &MF) const;
- void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
-
- // Debug information queries.
- unsigned getRARegister() const;
- unsigned getFrameRegister(MachineFunction &MF) const;
-
- // Exception handling queries.
- unsigned getEHExceptionRegister() const;
- unsigned getEHHandlerRegister() const;
- int getDwarfRegNum(unsigned RegNum, bool isEH) const;
+public:
+ SystemZRegisterInfo(SystemZTargetMachine &tm);
+
+ // Override TargetRegisterInfo.h.
+ bool requiresRegisterScavenging(const MachineFunction &MF) const override {
+ return true;
+ }
+ bool requiresFrameIndexScavenging(const MachineFunction &MF) const override {
+ return true;
+ }
+ bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override {
+ return true;
+ }
+ const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF = nullptr) const
+ override;
+ BitVector getReservedRegs(const MachineFunction &MF) const override;
+ void eliminateFrameIndex(MachineBasicBlock::iterator MI,
+ int SPAdj, unsigned FIOperandNum,
+ RegScavenger *RS) const override;
+ unsigned getFrameRegister(const MachineFunction &MF) const override;
};
} // end namespace llvm