Add rotates

[oota-llvm.git] / lib / Target / SystemZ / SystemZInstrInfo.td

diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td
index b08d0423fcd8c58e0451cc3355bb087e291ba7b8..67ae9c2722ad54f9fdbb8bb7eb6396db0ba3b162 100644 (file)
--- a/lib/Target/SystemZ/SystemZInstrInfo.td
+++ b/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -587,7 +587,6 @@ def SHL64ri  : Pseudo<(outs GR64:$dst), (ins GR64:$src, i32imm:$amt),
                       "sllg\t{$dst, $src, $amt}",
                       [(set GR64:$dst, (shl GR64:$src, (i32 imm:$amt)))]>;
 
-
 let Defs = [PSW] in {
 let isTwoAddress = 1 in
 def SRA32rri : Pseudo<(outs GR32:$dst), (ins GR32:$src, riaddr32:$amt),
@@ -604,6 +603,17 @@ def SRA64ri  : Pseudo<(outs GR64:$dst), (ins GR64:$src, i32imm:$amt),
                        (implicit PSW)]>;
 } // Defs = [PSW]
 
+let isTwoAddress = 1 in
+def ROTL32rri : Pseudo<(outs GR32:$dst), (ins GR32:$src, riaddr32:$amt),
+                       "rll\t{$src, $amt}",
+                       [(set GR32:$dst, (rotl GR32:$src, riaddr32:$amt))]>;
+def ROTL64rri : Pseudo<(outs GR64:$dst), (ins GR64:$src, riaddr:$amt),
+                       "rllg\t{$dst, $src, $amt}",
+                       [(set GR64:$dst, (rotl GR64:$src, (i32 (trunc riaddr:$amt))))]>;
+def ROTL64ri  : Pseudo<(outs GR64:$dst), (ins GR64:$src, i32imm:$amt),
+                       "rllg\t{$dst, $src, $amt}",
+                       [(set GR64:$dst, (rotl GR64:$src, (i32 imm:$amt)))]>;
+
 //===----------------------------------------------------------------------===//
 // Test instructions (like AND but do not produce any result