-//===-- Sparc.cpp - General implementation file for the Sparc Target ------===//
+//===-- SparcV9TargetMachine.cpp - SparcV9 Target Machine Implementation --===//
//
-// This file contains the code for the Sparc Target that does not fit in any of
-// the other files in this directory.
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// Primary interface to machine description for the UltraSPARC. Primarily just
+// initializes machine-dependent parameters in class TargetMachine, and creates
+// machine-dependent subclasses for classes such as TargetInstrInfo.
//
//===----------------------------------------------------------------------===//
-#include "SparcInternals.h"
-#include "MappingInfo.h"
#include "llvm/Function.h"
#include "llvm/PassManager.h"
#include "llvm/Assembly/PrintModulePass.h"
-#include "llvm/Transforms/Scalar.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/MachineFunctionInfo.h"
-#include "llvm/CodeGen/InstrSelection.h"
#include "llvm/CodeGen/InstrScheduling.h"
-#include "llvm/CodeGen/MachineCodeForInstruction.h"
+#include "llvm/CodeGen/IntrinsicLowering.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/Passes.h"
-#include "llvm/Target/TargetMachineImpls.h"
-#include "Support/CommandLine.h"
+#include "llvm/Target/TargetOptions.h"
+#include "llvm/Target/TargetMachineRegistry.h"
+#include "llvm/Transforms/Scalar.h"
+#include "MappingInfo.h"
+#include "MachineFunctionInfo.h"
+#include "MachineCodeForInstruction.h"
+#include "SparcV9Internals.h"
+#include "SparcV9TargetMachine.h"
+#include "SparcV9BurgISel.h"
+#include "llvm/Support/CommandLine.h"
+using namespace llvm;
static const unsigned ImplicitRegUseList[] = { 0 }; /* not used yet */
// Build the MachineInstruction Description Array...
-const TargetInstrDescriptor SparcMachineInstrDesc[] = {
+const TargetInstrDescriptor llvm::SparcV9MachineInstrDesc[] = {
#define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS) \
{ OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS, 0, \
ImplicitRegUseList, ImplicitRegUseList },
-#include "SparcInstr.def"
+#include "SparcV9Instr.def"
};
//---------------------------------------------------------------------------
// Command line options to control choice of code generation passes.
//---------------------------------------------------------------------------
-static cl::opt<bool> DisablePreOpt("disable-preopt",
- cl::desc("Disable optimizations prior to instruction selection"));
-
-static cl::opt<bool> DisableSched("disable-sched",
- cl::desc("Disable local scheduling pass"));
+namespace llvm {
+ bool EmitMappingInfo = false;
+}
-static cl::opt<bool> DisablePeephole("disable-peephole",
- cl::desc("Disable peephole optimization pass"));
+namespace {
+ cl::opt<bool> DisableSched("disable-sched",
+ cl::desc("Disable sparcv9 local scheduling pass"));
-static cl::opt<bool> EmitMappingInfo("enable-maps",
- cl::desc("Emit LLVM-to-MachineCode mapping info to assembly"));
+ cl::opt<bool> DisablePeephole("disable-peephole",
+ cl::desc("Disable sparcv9 peephole optimization pass"));
-static cl::opt<bool> DisableStrip("disable-strip",
- cl::desc("Do not strip the LLVM bytecode included in executable"));
+ cl::opt<bool, true> EmitMappingInfoOpt("enable-maps", cl::ReallyHidden,
+ cl::location(EmitMappingInfo),
+ cl::init(false),
+ cl::desc("Emit LLVM-to-MachineCode mapping info to assembly"));
-static cl::opt<bool> DumpInput("dump-input",
- cl::desc("Print bytecode before native code generation"),
- cl::Hidden);
+ cl::opt<bool> EnableModSched("enable-modsched",
+ cl::desc("Enable sparcv9 modulo scheduling pass instead of local scheduling"), cl::Hidden);
-//----------------------------------------------------------------------------
-// allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
-// that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface)
-//----------------------------------------------------------------------------
+ // Register the target.
+ RegisterTarget<SparcV9TargetMachine> X("sparcv9", " SPARC V9");
+}
-TargetMachine *allocateSparcTargetMachine(const Module &M) {
- return new UltraSparc();
+unsigned SparcV9TargetMachine::getJITMatchQuality() {
+#if defined(__sparcv9)
+ return 10;
+#else
+ return 0;
+#endif
}
-//---------------------------------------------------------------------------
-// class UltraSparcFrameInfo
-//
-// Interface to stack frame layout info for the UltraSPARC.
-// Starting offsets for each area of the stack frame are aligned at
-// a multiple of getStackFrameSizeAlignment().
-//---------------------------------------------------------------------------
+unsigned SparcV9TargetMachine::getModuleMatchQuality(const Module &M) {
+ // We strongly match "sparcv9-*".
+ std::string TT = M.getTargetTriple();
+ if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "sparcv9-")
+ return 20;
-int
-UltraSparcFrameInfo::getFirstAutomaticVarOffset(MachineFunction& ,
- bool& pos) const
-{
- pos = false; // static stack area grows downwards
- return StaticAreaOffsetFromFP;
-}
+ if (M.getEndianness() == Module::BigEndian &&
+ M.getPointerSize() == Module::Pointer64)
+ return 10; // Weak match
+ else if (M.getEndianness() != Module::AnyEndianness ||
+ M.getPointerSize() != Module::AnyPointerSize)
+ return 0; // Match for some other target
-int
-UltraSparcFrameInfo::getRegSpillAreaOffset(MachineFunction& mcInfo,
- bool& pos) const
-{
- // ensure no more auto vars are added
- mcInfo.getInfo()->freezeAutomaticVarsArea();
-
- pos = false; // static stack area grows downwards
- unsigned autoVarsSize = mcInfo.getInfo()->getAutomaticVarsSize();
- return StaticAreaOffsetFromFP - autoVarsSize;
+ return getJITMatchQuality()/2;
}
-int
-UltraSparcFrameInfo::getTmpAreaOffset(MachineFunction& mcInfo,
- bool& pos) const
-{
- MachineFunctionInfo *MFI = mcInfo.getInfo();
- MFI->freezeAutomaticVarsArea(); // ensure no more auto vars are added
- MFI->freezeSpillsArea(); // ensure no more spill slots are added
-
- pos = false; // static stack area grows downwards
- unsigned autoVarsSize = MFI->getAutomaticVarsSize();
- unsigned spillAreaSize = MFI->getRegSpillsSize();
- int offset = autoVarsSize + spillAreaSize;
- return StaticAreaOffsetFromFP - offset;
+//===---------------------------------------------------------------------===//
+// Code generation/destruction passes
+//===---------------------------------------------------------------------===//
+
+namespace {
+ class ConstructMachineFunction : public FunctionPass {
+ TargetMachine &Target;
+ public:
+ ConstructMachineFunction(TargetMachine &T) : Target(T) {}
+
+ const char *getPassName() const {
+ return "ConstructMachineFunction";
+ }
+
+ bool runOnFunction(Function &F) {
+ MachineFunction::construct(&F, Target).getInfo<SparcV9FunctionInfo>()->CalculateArgSize();
+ return false;
+ }
+ };
+
+ struct DestroyMachineFunction : public FunctionPass {
+ const char *getPassName() const { return "DestroyMachineFunction"; }
+
+ static void freeMachineCode(Instruction &I) {
+ MachineCodeForInstruction::destroy(&I);
+ }
+
+ bool runOnFunction(Function &F) {
+ for (Function::iterator FI = F.begin(), FE = F.end(); FI != FE; ++FI)
+ for (BasicBlock::iterator I = FI->begin(), E = FI->end(); I != E; ++I)
+ MachineCodeForInstruction::get(I).dropAllReferences();
+
+ for (Function::iterator FI = F.begin(), FE = F.end(); FI != FE; ++FI)
+ for_each(FI->begin(), FI->end(), freeMachineCode);
+
+ MachineFunction::destruct(&F);
+ return false;
+ }
+ };
+
+ FunctionPass *createMachineCodeConstructionPass(TargetMachine &Target) {
+ return new ConstructMachineFunction(Target);
+ }
}
-int
-UltraSparcFrameInfo::getDynamicAreaOffset(MachineFunction& mcInfo,
- bool& pos) const
-{
- // Dynamic stack area grows downwards starting at top of opt-args area.
- // The opt-args, required-args, and register-save areas are empty except
- // during calls and traps, so they are shifted downwards on each
- // dynamic-size alloca.
- pos = false;
- unsigned optArgsSize = mcInfo.getInfo()->getMaxOptionalArgsSize();
- if (int extra = optArgsSize % getStackFrameSizeAlignment())
- optArgsSize += (getStackFrameSizeAlignment() - extra);
- int offset = optArgsSize + FirstOptionalOutgoingArgOffsetFromSP;
- assert((offset - OFFSET) % getStackFrameSizeAlignment() == 0);
- return offset;
+FunctionPass *llvm::createSparcV9MachineCodeDestructionPass() {
+ return new DestroyMachineFunction();
}
-//---------------------------------------------------------------------------
-// class UltraSparcMachine
-//
-// Purpose:
-// Primary interface to machine description for the UltraSPARC.
-// Primarily just initializes machine-dependent parameters in
-// class TargetMachine, and creates machine-dependent subclasses
-// for classes such as TargetInstrInfo.
-//
-//---------------------------------------------------------------------------
-UltraSparc::UltraSparc()
- : TargetMachine("UltraSparc-Native", false),
+SparcV9TargetMachine::SparcV9TargetMachine(const Module &M,
+ IntrinsicLowering *il)
+ : TargetMachine("UltraSparcV9-Native", il, false),
schedInfo(*this),
regInfo(*this),
frameInfo(*this),
- cacheInfo(*this) {
+ jitInfo(*this) {
}
-
-// addPassesToEmitAssembly - This method controls the entire code generation
-// process for the ultra sparc.
-//
-bool UltraSparc::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
+/// addPassesToEmitAssembly - This method controls the entire code generation
+/// process for the ultra sparc.
+///
+bool
+SparcV9TargetMachine::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
{
- // The following 3 passes used to be inserted specially by llc.
+ // FIXME: Implement efficient support for garbage collection intrinsics.
+ PM.add(createLowerGCPass());
+
// Replace malloc and free instructions with library calls.
PM.add(createLowerAllocationsPass());
-
- // Strip all of the symbols from the bytecode so that it will be smaller...
- if (!DisableStrip)
- PM.add(createSymbolStrippingPass());
// FIXME: implement the switch instruction in the instruction selector.
PM.add(createLowerSwitchPass());
-
+
+ // FIXME: implement the invoke/unwind instructions!
+ PM.add(createLowerInvokePass());
+
// decompose multi-dimensional array references into single-dim refs
PM.add(createDecomposeMultiDimRefsPass());
-
+
+ // Lower LLVM code to the form expected by the SPARCv9 instruction selector.
+ PM.add(createPreSelectionPass(*this));
+ PM.add(createLowerSelectPass());
+
+ // If the user's trying to read the generated code, they'll need to see the
+ // transformed input.
+ if (PrintMachineCode)
+ PM.add(new PrintModulePass());
+
// Construct and initialize the MachineFunction object for this fn.
PM.add(createMachineCodeConstructionPass(*this));
- //Insert empty stackslots in the stack frame of each function
- //so %fp+offset-8 and %fp+offset-16 are empty slots now!
+ // Insert empty stackslots in the stack frame of each function
+ // so %fp+offset-8 and %fp+offset-16 are empty slots now!
PM.add(createStackSlotsPass(*this));
- if (!DisablePreOpt) {
- // Specialize LLVM code for this target machine
- PM.add(createPreSelectionPass(*this));
- // Run basic dataflow optimizations on LLVM code
- PM.add(createReassociatePass());
- PM.add(createLICMPass());
- PM.add(createGCSEPass());
- }
-
- // If LLVM dumping after transformations is requested, add it to the pipeline
- if (DumpInput)
- PM.add(new PrintFunctionPass("Input code to instr. selection:\n",
- &std::cerr));
-
- PM.add(createInstructionSelectionPass(*this));
+ PM.add(createSparcV9BurgInstSelector(*this));
if (!DisableSched)
PM.add(createInstructionSchedulingWithSSAPass(*this));
+ if(PrintMachineCode && EnableModSched)
+ PM.add(createMachineFunctionPrinterPass(&std::cerr, "Before modulo scheduling:\n"));
+
+ //Use ModuloScheduling if enabled, otherwise use local scheduling if not disabled.
+ if(EnableModSched)
+ PM.add(createModuloSchedulingPass(*this));
+
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(&std::cerr, "Before reg alloc:\n"));
+
PM.add(getRegisterAllocator(*this));
- PM.add(getPrologEpilogInsertionPass());
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(&std::cerr, "After reg alloc:\n"));
+
+ PM.add(createPrologEpilogInsertionPass());
if (!DisablePeephole)
PM.add(createPeepholeOptsPass(*this));
- if (EmitMappingInfo)
- PM.add(getMappingInfoAsmPrinterPass(Out));
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(&std::cerr, "Final code:\n"));
+
+ if (EmitMappingInfo) {
+ PM.add(createInternalGlobalMapperPass());
+ PM.add(getMappingInfoAsmPrinterPass(Out));
+ }
// Output assembly language to the .s file. Assembly emission is split into
// two parts: Function output and Global value output. This is because
// function output is pipelined with all of the rest of code generation stuff,
// allowing machine code representations for functions to be free'd after the
// function has been emitted.
- //
- PM.add(getFunctionAsmPrinterPass(Out));
- PM.add(createMachineCodeDestructionPass()); // Free stuff no longer needed
+ PM.add(createAsmPrinterPass(Out, *this));
- // Emit Module level assembly after all of the functions have been processed.
- PM.add(getModuleAsmPrinterPass(Out));
+ // Free machine-code IR which is no longer needed:
+ PM.add(createSparcV9MachineCodeDestructionPass());
// Emit bytecode to the assembly file into its special section next
if (EmitMappingInfo)
- PM.add(getBytecodeAsmPrinterPass(Out));
+ PM.add(createBytecodeAsmPrinterPass(Out));
return false;
}
-// addPassesToJITCompile - This method controls the JIT method of code
-// generation for the UltraSparc.
-//
-bool UltraSparc::addPassesToJITCompile(FunctionPassManager &PM) {
- const TargetData &TD = getTargetData();
-
- PM.add(new TargetData("lli", TD.isLittleEndian(), TD.getPointerSize(),
- TD.getPointerAlignment(), TD.getDoubleAlignment()));
+/// addPassesToJITCompile - This method controls the JIT method of code
+/// generation for the UltraSparcV9.
+///
+void SparcV9JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
+ // FIXME: Implement efficient support for garbage collection intrinsics.
+ PM.add(createLowerGCPass());
// Replace malloc and free instructions with library calls.
- // Do this after tracing until lli implements these lib calls.
- // For now, it will emulate malloc and free internally.
PM.add(createLowerAllocationsPass());
// FIXME: implement the switch instruction in the instruction selector.
PM.add(createLowerSwitchPass());
+ // FIXME: implement the invoke/unwind instructions!
+ PM.add(createLowerInvokePass());
+
// decompose multi-dimensional array references into single-dim refs
PM.add(createDecomposeMultiDimRefsPass());
-
+
+ // Lower LLVM code to the form expected by the SPARCv9 instruction selector.
+ PM.add(createPreSelectionPass(TM));
+ PM.add(createLowerSelectPass());
+
+ // If the user's trying to read the generated code, they'll need to see the
+ // transformed input.
+ if (PrintMachineCode)
+ PM.add(new PrintFunctionPass());
+
// Construct and initialize the MachineFunction object for this fn.
- PM.add(createMachineCodeConstructionPass(*this));
+ PM.add(createMachineCodeConstructionPass(TM));
- PM.add(createInstructionSelectionPass(*this));
+ PM.add(createSparcV9BurgInstSelector(TM));
- // new pass: convert Value* in MachineOperand to an unsigned register
- // this brings it in line with what the X86 JIT's RegisterAllocator expects
- //PM.add(createAddRegNumToValuesPass());
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(&std::cerr, "Before reg alloc:\n"));
- PM.add(getRegisterAllocator(*this));
- PM.add(getPrologEpilogInsertionPass());
+ PM.add(getRegisterAllocator(TM));
+
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(&std::cerr, "After reg alloc:\n"));
+
+ PM.add(createPrologEpilogInsertionPass());
if (!DisablePeephole)
- PM.add(createPeepholeOptsPass(*this));
+ PM.add(createPeepholeOptsPass(TM));
- return false; // success!
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(&std::cerr, "Final code:\n"));
}
+
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