Fix the missing symbols problem Bill was hitting. Patch contributed by

[oota-llvm.git] / lib / Target / SparcV9 / RegAlloc / LiveRangeInfo.cpp

diff --git a/lib/Target/SparcV9/RegAlloc/LiveRangeInfo.cpp b/lib/Target/SparcV9/RegAlloc/LiveRangeInfo.cpp
index b9fcda789f78c7621990784b5f3ac18cc24270cc..9a89b1354b925b59abb4558f223f9ab574ac999a 100644 (file)
--- a/lib/Target/SparcV9/RegAlloc/LiveRangeInfo.cpp
+++ b/lib/Target/SparcV9/RegAlloc/LiveRangeInfo.cpp
@@ -16,18 +16,22 @@
 #include "RegAllocCommon.h"
 #include "RegClass.h"
 #include "llvm/Function.h"
+#include "llvm/Type.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetInstrInfo.h"
-#include "llvm/Target/TargetRegInfo.h"
-#include "Support/SetOperations.h"
+#include "../SparcV9RegInfo.h"
+#include "llvm/ADT/SetOperations.h"
+#include <iostream>
+
+namespace llvm {
 
 unsigned LiveRange::getRegClassID() const { return getRegClass()->getID(); }
 
 LiveRangeInfo::LiveRangeInfo(const Function *F, const TargetMachine &tm,
                             std::vector<RegClass *> &RCL)
-  : Meth(F), TM(tm), RegClassList(RCL), MRI(tm.getRegInfo()) { }
+  : Meth(F), TM(tm), RegClassList(RCL), MRI(*tm.getRegInfo()) { }
 
 
 LiveRangeInfo::~LiveRangeInfo() {
@@ -62,11 +66,9 @@ void LiveRangeInfo::unionAndUpdateLRs(LiveRange *L1, LiveRange *L2) {
   assert(! (L1->hasColor() && L2->hasColor()) ||
          L1->getColor() == L2->getColor());
 
-  set_union(*L1, *L2);                   // add elements of L2 to L1
-
-  for(ValueSet::iterator L2It = L2->begin(); L2It != L2->end(); ++L2It) {
-    //assert(( L1->getTypeID() == L2->getTypeID()) && "Merge:Different types");
+  L2->insert (L1->begin(), L1->end());   // add elements of L2 to L1
 
+  for(LiveRange::iterator L2It = L2->begin(); L2It != L2->end(); ++L2It) {
     L1->insert(*L2It);                  // add the var in L2 to L1
     LiveRangeMap[*L2It] = L1;           // now the elements in L2 should map 
                                         //to L1    
@@ -149,7 +151,7 @@ void LiveRangeInfo::constructLiveRanges() {
 
   // first find the live ranges for all incoming args of the function since
   // those LRs start from the start of the function
-  for (Function::const_aiterator AI = Meth->abegin(); AI != Meth->aend(); ++AI)
+  for (Function::const_arg_iterator AI = Meth->arg_begin(); AI != Meth->arg_end(); ++AI)
     createNewLiveRange(AI, /*isCC*/ false);
 
   // Now suggest hardware registers for these function args 
@@ -169,20 +171,20 @@ void LiveRangeInfo::constructLiveRanges() {
     // iterate over all the machine instructions in BB
     for(MachineBasicBlock::iterator MInstIterator = MBB.begin();
         MInstIterator != MBB.end(); ++MInstIterator) {  
-      MachineInstr *MInst = *MInstIterator; 
+      MachineInstr *MInst = MInstIterator; 
 
       // If the machine instruction is a  call/return instruction, add it to
       // CallRetInstrList for processing its args, ret value, and ret addr.
       // 
-      if(TM.getInstrInfo().isReturn(MInst->getOpCode()) ||
-        TM.getInstrInfo().isCall(MInst->getOpCode()))
+      if(TM.getInstrInfo()->isReturn(MInst->getOpcode()) ||
+        TM.getInstrInfo()->isCall(MInst->getOpcode()))
        CallRetInstrList.push_back(MInst); 
  
       // iterate over explicit MI operands and create a new LR
       // for each operand that is defined by the instruction
       for (MachineInstr::val_op_iterator OpI = MInst->begin(),
              OpE = MInst->end(); OpI != OpE; ++OpI)
-       if (OpI.isDefOnly() || OpI.isDefAndUse()) {     
+       if (OpI.isDef()) {     
          const Value *Def = *OpI;
           bool isCC = (OpI.getMachineOperand().getType()
                        == MachineOperand::MO_CCRegister);
@@ -192,17 +194,15 @@ void LiveRangeInfo::constructLiveRanges() {
           // set it directly in the LiveRange
           if (OpI.getMachineOperand().hasAllocatedReg()) {
             unsigned getClassId;
-            LR->setColor(MRI.getClassRegNum(
-                                OpI.getMachineOperand().getAllocatedRegNum(),
-                                getClassId));
+            LR->setColor(MRI.getClassRegNum(OpI.getMachineOperand().getReg(),
+                                            getClassId));
           }
        }
 
       // iterate over implicit MI operands and create a new LR
       // for each operand that is defined by the instruction
       for (unsigned i = 0; i < MInst->getNumImplicitRefs(); ++i) 
-       if (MInst->getImplicitOp(i).opIsDefOnly() ||
-            MInst->getImplicitOp(i).opIsDefAndUse()) {     
+       if (MInst->getImplicitOp(i).isDef()) {
          const Value *Def = MInst->getImplicitRef(i);
           LiveRange* LR = createOrAddToLiveRange(Def, /*isCC*/ false);
 
@@ -211,7 +211,7 @@ void LiveRangeInfo::constructLiveRanges() {
           if (MInst->getImplicitOp(i).hasAllocatedReg()) {
             unsigned getClassId;
             LR->setColor(MRI.getClassRegNum(
-                                MInst->getImplicitOp(i).getAllocatedRegNum(),
+                                MInst->getImplicitOp(i).getReg(),
                                 getClassId));
           }
        }
@@ -242,11 +242,11 @@ void LiveRangeInfo::suggestRegs4CallRets() {
   std::vector<MachineInstr*>::iterator It = CallRetInstrList.begin();
   for( ; It != CallRetInstrList.end(); ++It) {
     MachineInstr *MInst = *It;
-    MachineOpCode OpCode = MInst->getOpCode();
+    MachineOpCode OpCode = MInst->getOpcode();
 
-    if ((TM.getInstrInfo()).isReturn(OpCode))
+    if (TM.getInstrInfo()->isReturn(OpCode))
       MRI.suggestReg4RetValue(MInst, *this);
-    else if ((TM.getInstrInfo()).isCall(OpCode))
+    else if (TM.getInstrInfo()->isCall(OpCode))
       MRI.suggestRegs4CallArgs(MInst, *this);
     else 
       assert( 0 && "Non call/ret instr in CallRetInstrList" );
@@ -329,7 +329,7 @@ void LiveRangeInfo::coalesceLRs()
 
     // iterate over all the machine instructions in BB
     for(MachineBasicBlock::iterator MII = MBB.begin(); MII != MBB.end(); ++MII){
-      const MachineInstr *MI = *MII;
+      const MachineInstr *MI = MII;
 
       if( DEBUG_RA >= RA_DEBUG_LiveRanges) {
        std::cerr << " *Iterating over machine instr ";
@@ -340,7 +340,7 @@ void LiveRangeInfo::coalesceLRs()
       // iterate over  MI operands to find defs
       for(MachineInstr::const_val_op_iterator DefI = MI->begin(),
             DefE = MI->end(); DefI != DefE; ++DefI) {
-       if (DefI.isDefOnly() || DefI.isDefAndUse()) { // this operand is modified
+       if (DefI.isDef()) { // this operand is modified
          LiveRange *LROfDef = getLiveRangeForValue( *DefI );
          RegClass *RCOfDef = LROfDef->getRegClass();
 
@@ -407,7 +407,9 @@ void LiveRangeInfo::printLiveRanges() {
         std::cerr << "LR# " << igNode->getIndex();
       else
         std::cerr << "LR# " << "<no-IGNode>";
-      std::cerr << "\t:Values = "; printSet(*HMI->second); std::cerr << "\n";
+      std::cerr << "\t:Values = " << *HMI->second << "\n";
     }
   }
 }
+
+} // End llvm namespace