//===-- LiveRangeInfo.cpp -------------------------------------------------===//
//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
// Live range construction for coloring-based register allocation for LLVM.
//
//===----------------------------------------------------------------------===//
-#include "llvm/CodeGen/LiveRangeInfo.h"
-#include "llvm/CodeGen/RegAllocCommon.h"
-#include "llvm/CodeGen/RegClass.h"
-#include "llvm/CodeGen/IGNode.h"
+#include "IGNode.h"
+#include "LiveRangeInfo.h"
+#include "RegAllocCommon.h"
+#include "RegClass.h"
+#include "llvm/Function.h"
+#include "llvm/Type.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetInstrInfo.h"
-#include "llvm/Function.h"
-#include "Support/SetOperations.h"
-using std::cerr;
+#include "../SparcV9RegInfo.h"
+#include "llvm/ADT/SetOperations.h"
+#include <iostream>
+
+namespace llvm {
+
+unsigned LiveRange::getRegClassID() const { return getRegClass()->getID(); }
LiveRangeInfo::LiveRangeInfo(const Function *F, const TargetMachine &tm,
std::vector<RegClass *> &RCL)
- : Meth(F), TM(tm), RegClassList(RCL), MRI(tm.getRegInfo()) { }
+ : Meth(F), TM(tm), RegClassList(RCL), MRI(*tm.getRegInfo()) { }
LiveRangeInfo::~LiveRangeInfo() {
void LiveRangeInfo::unionAndUpdateLRs(LiveRange *L1, LiveRange *L2) {
assert(L1 != L2 && (!L1->hasSuggestedColor() || !L2->hasSuggestedColor()));
- set_union(*L1, *L2); // add elements of L2 to L1
+ assert(! (L1->hasColor() && L2->hasColor()) ||
+ L1->getColor() == L2->getColor());
- for(ValueSet::iterator L2It = L2->begin(); L2It != L2->end(); ++L2It) {
- //assert(( L1->getTypeID() == L2->getTypeID()) && "Merge:Different types");
+ L2->insert (L1->begin(), L1->end()); // add elements of L2 to L1
+ for(LiveRange::iterator L2It = L2->begin(); L2It != L2->end(); ++L2It) {
L1->insert(*L2It); // add the var in L2 to L1
LiveRangeMap[*L2It] = L1; // now the elements in L2 should map
//to L1
}
-
-
- // Now if LROfDef(L1) has a suggested color, it will remain.
- // But, if LROfUse(L2) has a suggested color, the new range
- // must have the same color.
-
- if(L2->hasSuggestedColor())
- L1->setSuggestedColor(L2->getSuggestedColor());
-
-
+
+ // set call interference for L1 from L2
if (L2->isCallInterference())
L1->setCallInterference();
// add the spill costs
L1->addSpillCost(L2->getSpillCost());
+
+ // If L2 has a color, give L1 that color. Note that L1 may have had the same
+ // color or none, but would not have a different color as asserted above.
+ if (L2->hasColor())
+ L1->setColor(L2->getColor());
+
+ // Similarly, if LROfUse(L2) has a suggested color, the new range
+ // must have the same color.
+ if (L2->hasSuggestedColor())
+ L1->setSuggestedColor(L2->getSuggestedColor());
delete L2; // delete L2 as it is no longer needed
}
LiveRangeMap[Def] = DefRange; // and update the map.
// set the register class of the new live range
- DefRange->setRegClass(RegClassList[MRI.getRegClassIDOfValue(Def, isCC)]);
+ DefRange->setRegClass(RegClassList[MRI.getRegClassIDOfType(Def->getType(),
+ isCC)]);
if (DEBUG_RA >= RA_DEBUG_LiveRanges) {
- cerr << " Creating a LR for def ";
- if (isCC) cerr << " (CC Register!)";
- cerr << " : " << RAV(Def) << "\n";
+ std::cerr << " Creating a LR for def ";
+ if (isCC) std::cerr << " (CC Register!)";
+ std::cerr << " : " << RAV(Def) << "\n";
}
return DefRange;
}
DefRange->insert(Def); // add the operand to the range
LiveRangeMap[Def] = DefRange; // make operand point to merged set
if (DEBUG_RA >= RA_DEBUG_LiveRanges)
- cerr << " Added to existing LR for def: " << RAV(Def) << "\n";
+ std::cerr << " Added to existing LR for def: " << RAV(Def) << "\n";
}
return DefRange;
}
void LiveRangeInfo::constructLiveRanges() {
if (DEBUG_RA >= RA_DEBUG_LiveRanges)
- cerr << "Constructing Live Ranges ...\n";
+ std::cerr << "Constructing Live Ranges ...\n";
// first find the live ranges for all incoming args of the function since
// those LRs start from the start of the function
- for (Function::const_aiterator AI = Meth->abegin(); AI != Meth->aend(); ++AI)
+ for (Function::const_arg_iterator AI = Meth->arg_begin(); AI != Meth->arg_end(); ++AI)
createNewLiveRange(AI, /*isCC*/ false);
// Now suggest hardware registers for these function args
// iterate over all the machine instructions in BB
for(MachineBasicBlock::iterator MInstIterator = MBB.begin();
MInstIterator != MBB.end(); ++MInstIterator) {
- MachineInstr *MInst = *MInstIterator;
+ MachineInstr *MInst = MInstIterator;
// If the machine instruction is a call/return instruction, add it to
// CallRetInstrList for processing its args, ret value, and ret addr.
//
- if(TM.getInstrInfo().isReturn(MInst->getOpCode()) ||
- TM.getInstrInfo().isCall(MInst->getOpCode()))
+ if(TM.getInstrInfo()->isReturn(MInst->getOpcode()) ||
+ TM.getInstrInfo()->isCall(MInst->getOpcode()))
CallRetInstrList.push_back(MInst);
// iterate over explicit MI operands and create a new LR
const Value *Def = *OpI;
bool isCC = (OpI.getMachineOperand().getType()
== MachineOperand::MO_CCRegister);
- createOrAddToLiveRange(Def, isCC);
+ LiveRange* LR = createOrAddToLiveRange(Def, isCC);
+
+ // If the operand has a pre-assigned register,
+ // set it directly in the LiveRange
+ if (OpI.getMachineOperand().hasAllocatedReg()) {
+ unsigned getClassId;
+ LR->setColor(MRI.getClassRegNum(OpI.getMachineOperand().getReg(),
+ getClassId));
+ }
}
// iterate over implicit MI operands and create a new LR
// for each operand that is defined by the instruction
for (unsigned i = 0; i < MInst->getNumImplicitRefs(); ++i)
- if (MInst->implicitRefIsDefined(i)) {
+ if (MInst->getImplicitOp(i).isDef()) {
const Value *Def = MInst->getImplicitRef(i);
- createOrAddToLiveRange(Def, /*isCC*/ false);
+ LiveRange* LR = createOrAddToLiveRange(Def, /*isCC*/ false);
+
+ // If the implicit operand has a pre-assigned register,
+ // set it directly in the LiveRange
+ if (MInst->getImplicitOp(i).hasAllocatedReg()) {
+ unsigned getClassId;
+ LR->setColor(MRI.getClassRegNum(
+ MInst->getImplicitOp(i).getReg(),
+ getClassId));
+ }
}
} // for all machine instructions in the BB
-
} // for all BBs in function
// Now we have to suggest clors for call and return arg live ranges.
suggestRegs4CallRets();
if( DEBUG_RA >= RA_DEBUG_LiveRanges)
- cerr << "Initial Live Ranges constructed!\n";
+ std::cerr << "Initial Live Ranges constructed!\n";
}
std::vector<MachineInstr*>::iterator It = CallRetInstrList.begin();
for( ; It != CallRetInstrList.end(); ++It) {
MachineInstr *MInst = *It;
- MachineOpCode OpCode = MInst->getOpCode();
+ MachineOpCode OpCode = MInst->getOpcode();
- if ((TM.getInstrInfo()).isReturn(OpCode))
+ if (TM.getInstrInfo()->isReturn(OpCode))
MRI.suggestReg4RetValue(MInst, *this);
- else if ((TM.getInstrInfo()).isCall(OpCode))
+ else if (TM.getInstrInfo()->isCall(OpCode))
MRI.suggestRegs4CallArgs(MInst, *this);
else
assert( 0 && "Non call/ret instr in CallRetInstrList" );
*/
//---------------------------------------------------------------------------
+
+
+// Checks if live range LR interferes with any node assigned or suggested to
+// be assigned the specified color
+//
+inline bool InterferesWithColor(const LiveRange& LR, unsigned color) {
+ IGNode* lrNode = LR.getUserIGNode();
+ for (unsigned n=0, NN = lrNode->getNumOfNeighbors(); n < NN; n++) {
+ LiveRange *neighLR = lrNode->getAdjIGNode(n)->getParentLR();
+ if (neighLR->hasColor() && neighLR->getColor() == color)
+ return true;
+ if (neighLR->hasSuggestedColor() && neighLR->getSuggestedColor() == color)
+ return true;
+ }
+ return false;
+}
+
+// Cannot coalesce if any of the following is true:
+// (1) Both LRs have suggested colors (should be "different suggested colors"?)
+// (2) Both LR1 and LR2 have colors and the colors are different
+// (but if the colors are the same, it is definitely safe to coalesce)
+// (3) LR1 has color and LR2 interferes with any LR that has the same color
+// (4) LR2 has color and LR1 interferes with any LR that has the same color
+//
+inline bool InterfsPreventCoalescing(const LiveRange& LROfDef,
+ const LiveRange& LROfUse) {
+ // (4) if they have different suggested colors, cannot coalesce
+ if (LROfDef.hasSuggestedColor() && LROfUse.hasSuggestedColor())
+ return true;
+
+ // if neither has a color, nothing more to do.
+ if (! LROfDef.hasColor() && ! LROfUse.hasColor())
+ return false;
+
+ // (2, 3) if L1 has color...
+ if (LROfDef.hasColor()) {
+ if (LROfUse.hasColor())
+ return (LROfUse.getColor() != LROfDef.getColor());
+ return InterferesWithColor(LROfUse, LROfDef.getColor());
+ }
+
+ // (4) else only LROfUse has a color: check if that could interfere
+ return InterferesWithColor(LROfDef, LROfUse.getColor());
+}
+
+
void LiveRangeInfo::coalesceLRs()
{
if(DEBUG_RA >= RA_DEBUG_LiveRanges)
- cerr << "\nCoalescing LRs ...\n";
+ std::cerr << "\nCoalescing LRs ...\n";
MachineFunction &MF = MachineFunction::get(Meth);
for (MachineFunction::iterator BBI = MF.begin(); BBI != MF.end(); ++BBI) {
// iterate over all the machine instructions in BB
for(MachineBasicBlock::iterator MII = MBB.begin(); MII != MBB.end(); ++MII){
- const MachineInstr *MI = *MII;
+ const MachineInstr *MI = MII;
if( DEBUG_RA >= RA_DEBUG_LiveRanges) {
- cerr << " *Iterating over machine instr ";
+ std::cerr << " *Iterating over machine instr ";
MI->dump();
- cerr << "\n";
+ std::cerr << "\n";
}
// iterate over MI operands to find defs
for(MachineInstr::const_val_op_iterator DefI = MI->begin(),
DefE = MI->end(); DefI != DefE; ++DefI) {
- if (DefI.isDef()) { // iff this operand is a def
+ if (DefI.isDef()) { // this operand is modified
LiveRange *LROfDef = getLiveRangeForValue( *DefI );
RegClass *RCOfDef = LROfDef->getRegClass();
if (!LROfUse) { // if LR of use is not found
//don't warn about labels
if (!isa<BasicBlock>(*UseI) && DEBUG_RA >= RA_DEBUG_LiveRanges)
- cerr << " !! Warning: No LR for use " << RAV(*UseI) << "\n";
+ std::cerr << " !! Warning: No LR for use " << RAV(*UseI)<< "\n";
continue; // ignore and continue
}
if (LROfUse == LROfDef) // nothing to merge if they are same
continue;
- if (MRI.getRegType(LROfDef) == MRI.getRegType(LROfUse)) {
-
+ if (MRI.getRegTypeForLR(LROfDef) ==
+ MRI.getRegTypeForLR(LROfUse)) {
// If the two RegTypes are the same
if (!RCOfDef->getInterference(LROfDef, LROfUse) ) {
}
if (CombinedDegree <= RCOfDef->getNumOfAvailRegs()) {
- // if both LRs do not have suggested colors
- if (!(LROfDef->hasSuggestedColor() &&
- LROfUse->hasSuggestedColor())) {
-
+ // if both LRs do not have different pre-assigned colors
+ // and both LRs do not have suggested colors
+ if (! InterfsPreventCoalescing(*LROfDef, *LROfUse)) {
RCOfDef->mergeIGNodesOfLRs(LROfDef, LROfUse);
unionAndUpdateLRs(LROfDef, LROfUse);
}
} // for all BBs
if (DEBUG_RA >= RA_DEBUG_LiveRanges)
- cerr << "\nCoalescing Done!\n";
+ std::cerr << "\nCoalescing Done!\n";
}
-
-
-
-
/*--------------------------- Debug code for printing ---------------*/
void LiveRangeInfo::printLiveRanges() {
LiveRangeMapType::iterator HMI = LiveRangeMap.begin(); // hash map iterator
- cerr << "\nPrinting Live Ranges from Hash Map:\n";
+ std::cerr << "\nPrinting Live Ranges from Hash Map:\n";
for( ; HMI != LiveRangeMap.end(); ++HMI) {
if (HMI->first && HMI->second) {
- cerr << " Value* " << RAV(HMI->first) << "\t: ";
+ std::cerr << " Value* " << RAV(HMI->first) << "\t: ";
if (IGNode* igNode = HMI->second->getUserIGNode())
- cerr << "LR# " << igNode->getIndex();
+ std::cerr << "LR# " << igNode->getIndex();
else
- cerr << "LR# " << "<no-IGNode>";
- cerr << "\t:Values = "; printSet(*HMI->second); cerr << "\n";
+ std::cerr << "LR# " << "<no-IGNode>";
+ std::cerr << "\t:Values = " << *HMI->second << "\n";
}
}
}
+
+} // End llvm namespace