//===-- LiveRangeInfo.cpp -------------------------------------------------===//
//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
// Live range construction for coloring-based register allocation for LLVM.
//
//===----------------------------------------------------------------------===//
+#include "IGNode.h"
#include "LiveRangeInfo.h"
#include "RegAllocCommon.h"
#include "RegClass.h"
-#include "IGNode.h"
+#include "llvm/Function.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetInstrInfo.h"
-#include "llvm/Target/TargetRegInfo.h"
-#include "llvm/Function.h"
+#include "../SparcV9RegInfo.h"
#include "Support/SetOperations.h"
+namespace llvm {
+
unsigned LiveRange::getRegClassID() const { return getRegClass()->getID(); }
LiveRangeInfo::LiveRangeInfo(const Function *F, const TargetMachine &tm,
// iterate over all the machine instructions in BB
for(MachineBasicBlock::iterator MInstIterator = MBB.begin();
MInstIterator != MBB.end(); ++MInstIterator) {
- MachineInstr *MInst = *MInstIterator;
+ MachineInstr *MInst = MInstIterator;
// If the machine instruction is a call/return instruction, add it to
// CallRetInstrList for processing its args, ret value, and ret addr.
//
- if(TM.getInstrInfo().isReturn(MInst->getOpCode()) ||
- TM.getInstrInfo().isCall(MInst->getOpCode()))
+ if(TM.getInstrInfo().isReturn(MInst->getOpcode()) ||
+ TM.getInstrInfo().isCall(MInst->getOpcode()))
CallRetInstrList.push_back(MInst);
// iterate over explicit MI operands and create a new LR
// for each operand that is defined by the instruction
for (MachineInstr::val_op_iterator OpI = MInst->begin(),
OpE = MInst->end(); OpI != OpE; ++OpI)
- if (OpI.isDefOnly() || OpI.isDefAndUse()) {
+ if (OpI.isDef()) {
const Value *Def = *OpI;
bool isCC = (OpI.getMachineOperand().getType()
== MachineOperand::MO_CCRegister);
// set it directly in the LiveRange
if (OpI.getMachineOperand().hasAllocatedReg()) {
unsigned getClassId;
- LR->setColor(MRI.getClassRegNum(
- OpI.getMachineOperand().getAllocatedRegNum(),
- getClassId));
+ LR->setColor(MRI.getClassRegNum(OpI.getMachineOperand().getReg(),
+ getClassId));
}
}
// iterate over implicit MI operands and create a new LR
// for each operand that is defined by the instruction
for (unsigned i = 0; i < MInst->getNumImplicitRefs(); ++i)
- if (MInst->getImplicitOp(i).opIsDefOnly() ||
- MInst->getImplicitOp(i).opIsDefAndUse()) {
+ if (MInst->getImplicitOp(i).isDef()) {
const Value *Def = MInst->getImplicitRef(i);
LiveRange* LR = createOrAddToLiveRange(Def, /*isCC*/ false);
if (MInst->getImplicitOp(i).hasAllocatedReg()) {
unsigned getClassId;
LR->setColor(MRI.getClassRegNum(
- MInst->getImplicitOp(i).getAllocatedRegNum(),
+ MInst->getImplicitOp(i).getReg(),
getClassId));
}
}
} // for all machine instructions in the BB
-
} // for all BBs in function
// Now we have to suggest clors for call and return arg live ranges.
std::vector<MachineInstr*>::iterator It = CallRetInstrList.begin();
for( ; It != CallRetInstrList.end(); ++It) {
MachineInstr *MInst = *It;
- MachineOpCode OpCode = MInst->getOpCode();
+ MachineOpCode OpCode = MInst->getOpcode();
if ((TM.getInstrInfo()).isReturn(OpCode))
MRI.suggestReg4RetValue(MInst, *this);
// Checks if live range LR interferes with any node assigned or suggested to
// be assigned the specified color
//
-inline bool InterferesWithColor(const LiveRange& LR, unsigned color)
-{
+inline bool InterferesWithColor(const LiveRange& LR, unsigned color) {
IGNode* lrNode = LR.getUserIGNode();
for (unsigned n=0, NN = lrNode->getNumOfNeighbors(); n < NN; n++) {
LiveRange *neighLR = lrNode->getAdjIGNode(n)->getParentLR();
// (4) LR2 has color and LR1 interferes with any LR that has the same color
//
inline bool InterfsPreventCoalescing(const LiveRange& LROfDef,
- const LiveRange& LROfUse)
-{
+ const LiveRange& LROfUse) {
// (4) if they have different suggested colors, cannot coalesce
if (LROfDef.hasSuggestedColor() && LROfUse.hasSuggestedColor())
return true;
// iterate over all the machine instructions in BB
for(MachineBasicBlock::iterator MII = MBB.begin(); MII != MBB.end(); ++MII){
- const MachineInstr *MI = *MII;
+ const MachineInstr *MI = MII;
if( DEBUG_RA >= RA_DEBUG_LiveRanges) {
std::cerr << " *Iterating over machine instr ";
// iterate over MI operands to find defs
for(MachineInstr::const_val_op_iterator DefI = MI->begin(),
DefE = MI->end(); DefI != DefE; ++DefI) {
- if (DefI.isDefOnly() || DefI.isDefAndUse()) { // this operand is modified
+ if (DefI.isDef()) { // this operand is modified
LiveRange *LROfDef = getLiveRangeForValue( *DefI );
RegClass *RCOfDef = LROfDef->getRegClass();
}
}
}
+
+} // End llvm namespace