-//===- SparcV8InstrInfo.td - Describe the SparcV8 Instruction Set -*- C++ -*-=//
+//===- SparcV8Instrs.td - Target Description for SparcV8 Target -----------===//
//
// The LLVM Compiler Infrastructure
//
//
//===----------------------------------------------------------------------===//
//
+// This file describes the SparcV8 instructions in TableGen format.
//
//===----------------------------------------------------------------------===//
-class Format<bits<4> val> {
- bits<4> Value = val;
-}
+include "../Target.td"
+include "SparcV8Reg.td"
-// All of the SparcV8 instruction formats, plus a pseudo-instruction format:
-def Pseudo : Format<0>;
-def IForm : Format<1>;
-def BForm : Format<2>;
-def SCForm : Format<3>;
-def DForm : Format<4>;
-def XForm : Format<5>;
-def XLForm : Format<6>;
-def XFXForm : Format<7>;
-def XFLForm : Format<8>;
-def XOForm : Format<9>;
-def AForm : Format<10>;
-def MForm : Format<11>;
-
-class PPCInst<string nm, bits<6> opcd, Format f> : Instruction {
- let Namespace = "SparcV8";
-
- let Name = nm;
- bits<6> Opcode = opcd;
- Format Form = f;
- bits<4> FormBits = Form.Value;
-}
+//===----------------------------------------------------------------------===//
+// Instructions
+//===----------------------------------------------------------------------===//
-// Pseudo-instructions:
-def PHI : PPCInst<"PHI", 0, Pseudo>; // PHI node...
-def NOP : PPCInst<"NOP", 0, Pseudo>; // No-op
-def ADJCALLSTACKDOWN : PPCInst<"ADJCALLSTACKDOWN", 0, Pseudo>;
-def ADJCALLSTACKUP : PPCInst<"ADJCALLSTACKUP", 0, Pseudo>;
+class InstV8 : Instruction { // SparcV8 instruction baseline
+ field bits<32> Inst;
+
+ let Namespace = "V8";
+
+ bits<2> op;
+ let Inst{31-30} = op; // Top two bits are the 'op' field
+
+ // Bit attributes specific to SparcV8 instructions
+ bit isPasi = 0; // Does this instruction affect an alternate addr space?
+ bit isPrivileged = 0; // Is this a privileged instruction?
+}
+include "SparcV8Instrs_F2.td"
+include "SparcV8Instrs_F3.td"