split LowerMEMCPY into LowerMEMCPYCall and LowerMEMCPYInline in the ARM backend.

[oota-llvm.git] / lib / Target / Sparc / SparcRegisterInfo.h

diff --git a/lib/Target/Sparc/SparcRegisterInfo.h b/lib/Target/Sparc/SparcRegisterInfo.h
index f739551f8693f568798f3ee687c329e787984a59..01399100724d5a71c4b651e88887e8ce816dd503 100644 (file)
--- a/lib/Target/Sparc/SparcRegisterInfo.h
+++ b/lib/Target/Sparc/SparcRegisterInfo.h
@@ -1,4 +1,4 @@
-//===- SparcV8RegisterInfo.h - SparcV8 Register Information Impl -*- C++ -*-==//
+//===- SparcRegisterInfo.h - Sparc Register Information Impl ----*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -7,25 +7,27 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This file contains the SparcV8 implementation of the MRegisterInfo class.
+// This file contains the Sparc implementation of the MRegisterInfo class.
 //
 //===----------------------------------------------------------------------===//
 
-#ifndef SPARCV8REGISTERINFO_H
-#define SPARCV8REGISTERINFO_H
+#ifndef SPARCREGISTERINFO_H
+#define SPARCREGISTERINFO_H
 
 #include "llvm/Target/MRegisterInfo.h"
-#include "SparcV8GenRegisterInfo.h.inc"
+#include "SparcGenRegisterInfo.h.inc"
 
 namespace llvm {
 
-class SparcV8Subtarget;
+class SparcSubtarget;
+class TargetInstrInfo;
 class Type;
 
-struct SparcV8RegisterInfo : public SparcV8GenRegisterInfo {
-  SparcV8Subtarget &Subtarget;
+struct SparcRegisterInfo : public SparcGenRegisterInfo {
+  SparcSubtarget &Subtarget;
+  const TargetInstrInfo &TII;
   
-  SparcV8RegisterInfo(SparcV8Subtarget &st);
+  SparcRegisterInfo(SparcSubtarget &st, const TargetInstrInfo &tii);
 
   /// Code Generation virtual methods...
   void storeRegToStackSlot(MachineBasicBlock &MBB,
@@ -33,29 +35,67 @@ struct SparcV8RegisterInfo : public SparcV8GenRegisterInfo {
                            unsigned SrcReg, int FrameIndex,
                            const TargetRegisterClass *RC) const;
 
+  void storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
+                      SmallVectorImpl<MachineOperand> &Addr,
+                      const TargetRegisterClass *RC,
+                      SmallVectorImpl<MachineInstr*> &NewMIs) const;
+
   void loadRegFromStackSlot(MachineBasicBlock &MBB,
                             MachineBasicBlock::iterator MBBI,
                             unsigned DestReg, int FrameIndex,
                             const TargetRegisterClass *RC) const;
 
+  void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
+                       SmallVectorImpl<MachineOperand> &Addr,
+                       const TargetRegisterClass *RC,
+                       SmallVectorImpl<MachineInstr*> &NewMIs) const;
+
   void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
                     unsigned DestReg, unsigned SrcReg,
-                    const TargetRegisterClass *RC) const;
+                    const TargetRegisterClass *DestRC,
+                    const TargetRegisterClass *SrcRC) const;
   
+  void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
+                     unsigned DestReg, const MachineInstr *Orig) const;
+
   virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
                                           unsigned OpNum,
                                           int FrameIndex) const;
 
+  virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
+                                          unsigned OpNum,
+                                          MachineInstr* LoadMI) const {
+    return 0;
+  }
+
+  const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
+
+  const TargetRegisterClass* const* getCalleeSavedRegClasses(
+                                     const MachineFunction *MF = 0) const;
+
+  BitVector getReservedRegs(const MachineFunction &MF) const;
+
+  bool hasFP(const MachineFunction &MF) const;
+
   void eliminateCallFramePseudoInstr(MachineFunction &MF,
                                      MachineBasicBlock &MBB,
                                      MachineBasicBlock::iterator I) const;
 
-  void eliminateFrameIndex(MachineBasicBlock::iterator II) const;
+  void eliminateFrameIndex(MachineBasicBlock::iterator II,
+                           int SPAdj, RegScavenger *RS = NULL) const;
 
   void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
 
   void emitPrologue(MachineFunction &MF) const;
   void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
+  
+  // Debug information queries.
+  unsigned getRARegister() const;
+  unsigned getFrameRegister(MachineFunction &MF) const;
+
+  // Exception handling queries.
+  unsigned getEHExceptionRegister() const;
+  unsigned getEHHandlerRegister() const;
 };
 
 } // end namespace llvm