[Sparc] Add initial implementation of MC Code emitter for sparc.

[oota-llvm.git] / lib / Target / Sparc / Makefile

diff --git a/lib/Target/Sparc/Makefile b/lib/Target/Sparc/Makefile
index 2c9e3413bfe288299aca9ad5a8b2599f651d8169..94a8dd01d47e3d5c8d8863b3de5b655c9dfbb482 100644 (file)
--- a/lib/Target/Sparc/Makefile
+++ b/lib/Target/Sparc/Makefile
@@ -1,42 +1,24 @@
-##===- lib/Target/SparcV8/Makefile -------------------------*- Makefile -*-===##
-# 
+##===- lib/Target/Sparc/Makefile ---------------------------*- Makefile -*-===##
+#
 #                     The LLVM Compiler Infrastructure
 #
-# This file was developed by the LLVM research group and is distributed under
-# the University of Illinois Open Source License. See LICENSE.TXT for details.
-# 
+# This file is distributed under the University of Illinois Open Source
+# License. See LICENSE.TXT for details.
+#
 ##===----------------------------------------------------------------------===##
-LEVEL = ../../..
-LIBRARYNAME = sparcv8
-include $(LEVEL)/Makefile.common
 
-TDFILES := $(wildcard $(SourceDir)/*.td) $(SourceDir)/../Target.td
-TDFILE  := $(SourceDir)/SparcV8.td
+LEVEL = ../../..
+LIBRARYNAME = LLVMSparcCodeGen
+TARGET = Sparc
 
 # Make sure that tblgen is run, first thing.
-$(SourceDepend): SparcV8GenRegisterInfo.h.inc SparcV8GenRegisterNames.inc \
-                 SparcV8GenRegisterInfo.inc SparcV8GenInstrNames.inc \
-                 SparcV8GenInstrInfo.inc
+BUILT_SOURCES = SparcGenRegisterInfo.inc SparcGenInstrInfo.inc \
+               SparcGenAsmWriter.inc SparcGenAsmMatcher.inc \
+               SparcGenDAGISel.inc \
+               SparcGenSubtargetInfo.inc SparcGenCallingConv.inc \
+               SparcGenCodeEmitter.inc SparcGenMCCodeEmitter.inc
 
-SparcV8GenRegisterNames.inc:: $(TDFILES) $(TBLGEN)
-       @echo "Building SparcV8.td register names with tblgen"
-       $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-register-enums -o $@
+DIRS = InstPrinter AsmParser TargetInfo MCTargetDesc
 
-SparcV8GenRegisterInfo.h.inc:: $(TDFILES) $(TBLGEN)
-       @echo "Building SparcV8.td register information header with tblgen"
-       $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-register-desc-header -o $@
-
-SparcV8GenRegisterInfo.inc:: $(TDFILES) $(TBLGEN)
-       @echo "Building SparcV8.td register information implementation with tblgen"
-       $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-register-desc -o $@
-
-SparcV8GenInstrNames.inc:: $(TDFILES) $(TBLGEN)
-       @echo "Building SparcV8.td instruction names with tblgen"
-       $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-enums -o $@
-
-SparcV8GenInstrInfo.inc:: $(TDFILES) $(TBLGEN)
-       @echo "Building SparcV8.td instruction information with tblgen"
-       $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-desc -o $@
+include $(LEVEL)/Makefile.common
 
-clean::
-       $(VERB) rm -f *.inc