Use uint16_t to store register overlaps to reduce static data.

[oota-llvm.git] / lib / Target / Sparc / Makefile

diff --git a/lib/Target/Sparc/Makefile b/lib/Target/Sparc/Makefile
index f2f8c5f8ce6a3d7082c8238aaaa2f4e8ce169e24..4b81ada956f2ece540d7c344e03640909d529081 100644 (file)
--- a/lib/Target/Sparc/Makefile
+++ b/lib/Target/Sparc/Makefile
@@ -1,19 +1,22 @@
-##===- lib/Target/Sparc/V8/Makefile ------------------------*- Makefile -*-===##
-# 
+##===- lib/Target/Sparc/Makefile ---------------------------*- Makefile -*-===##
+#
 #                     The LLVM Compiler Infrastructure
 #
-# This file was developed by the LLVM research group and is distributed under
-# the University of Illinois Open Source License. See LICENSE.TXT for details.
-# 
+# This file is distributed under the University of Illinois Open Source
+# License. See LICENSE.TXT for details.
+#
 ##===----------------------------------------------------------------------===##
-LEVEL = ../../../..
-LIBRARYNAME = LLVMSparcV8
-TARGET = SparcV8
+
+LEVEL = ../../..
+LIBRARYNAME = LLVMSparcCodeGen
+TARGET = Sparc
 
 # Make sure that tblgen is run, first thing.
-BUILT_SOURCES = SparcV8GenRegisterInfo.h.inc SparcV8GenRegisterNames.inc \
-                SparcV8GenRegisterInfo.inc SparcV8GenInstrNames.inc \
-                SparcV8GenInstrInfo.inc SparcV8GenCodeEmitter.inc
+BUILT_SOURCES = SparcGenRegisterInfo.inc SparcGenInstrInfo.inc \
+               SparcGenAsmWriter.inc SparcGenDAGISel.inc \
+               SparcGenSubtargetInfo.inc SparcGenCallingConv.inc
+
+DIRS = TargetInfo MCTargetDesc
 
 include $(LEVEL)/Makefile.common