Clean up the use of static and anonymous namespaces. This turned up

[oota-llvm.git] / lib / Target / PowerPC / PPCTargetMachine.cpp

diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp
index 6d5e05077379e0980f923dc22b79d3ed2a6415f7..cfec534ac20d7f21c20a8f8890a64bfc1d918de9 100644 (file)
--- a/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -2,8 +2,8 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
@@ -19,13 +19,11 @@
 #include "llvm/Target/TargetMachineRegistry.h"
 using namespace llvm;
 
-namespace {
-  // Register the targets
-  RegisterTarget<PPC32TargetMachine>
-  X("ppc32", "  PowerPC 32");
-  RegisterTarget<PPC64TargetMachine>
-  Y("ppc64", "  PowerPC 64");
-}
+// Register the targets
+static RegisterTarget<PPC32TargetMachine>
+X("ppc32", "  PowerPC 32");
+static RegisterTarget<PPC64TargetMachine>
+Y("ppc64", "  PowerPC 64");
 
 const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
   if (Subtarget.isDarwin())
@@ -55,6 +53,9 @@ unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
   if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
     return 20;
   
+  // If the target triple is something non-powerpc, we don't match.
+  if (!TT.empty()) return 0;
+  
   if (M.getEndianness()  == Module::BigEndian &&
       M.getPointerSize() == Module::Pointer32)
     return 10;                                   // Weak match
@@ -89,16 +90,17 @@ PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS,
     FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
     InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
 
-  if (getRelocationModel() == Reloc::Default)
+  if (getRelocationModel() == Reloc::Default) {
     if (Subtarget.isDarwin())
       setRelocationModel(Reloc::DynamicNoPIC);
     else
       setRelocationModel(Reloc::Static);
+  }
 }
 
 /// Override this for PowerPC.  Tail merging happily breaks up instruction issue
 /// groups, which typically degrades performance.
-const bool PPCTargetMachine::DoTailMergeDefault() const { return false; }
+bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
 
 PPC32TargetMachine::PPC32TargetMachine(const Module &M, const std::string &FS) 
   : PPCTargetMachine(M, FS, false) {
@@ -114,27 +116,27 @@ PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS)
 // Pass Pipeline Configuration
 //===----------------------------------------------------------------------===//
 
-bool PPCTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
+bool PPCTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
   // Install an instruction selector.
   PM.add(createPPCISelDag(*this));
   return false;
 }
 
-bool PPCTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
+bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
   
   // Must run branch selection immediately preceding the asm printer.
   PM.add(createPPCBranchSelectionPass());
   return false;
 }
 
-bool PPCTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
+bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
                                           std::ostream &Out) {
   PM.add(createPPCAsmPrinterPass(Out, *this));
   return false;
 }
 
-bool PPCTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
-                                      MachineCodeEmitter &MCE) {
+bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
+                                      bool DumpAsm, MachineCodeEmitter &MCE) {
   // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
   // FIXME: This should be moved to TargetJITInfo!!
   if (Subtarget.isPPC64()) {
@@ -152,12 +154,16 @@ bool PPCTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
   
   // Machine code emitter pass for PowerPC.
   PM.add(createPPCCodeEmitterPass(*this, MCE));
+  if (DumpAsm) 
+    PM.add(createPPCAsmPrinterPass(*cerr.stream(), *this));
   return false;
 }
 
-bool PPCTargetMachine::addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
-                                            MachineCodeEmitter &MCE) {
+bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
+                                            bool DumpAsm, MachineCodeEmitter &MCE) {
   // Machine code emitter pass for PowerPC.
   PM.add(createPPCCodeEmitterPass(*this, MCE));
+  if (DumpAsm) 
+    PM.add(createPPCAsmPrinterPass(*cerr.stream(), *this));
   return false;
 }