//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
#include "llvm/Target/TargetMachineRegistry.h"
using namespace llvm;
-namespace {
- // Register the targets
- RegisterTarget<PPC32TargetMachine>
- X("ppc32", " PowerPC 32");
- RegisterTarget<PPC64TargetMachine>
- Y("ppc64", " PowerPC 64");
-}
+// Register the targets
+static RegisterTarget<PPC32TargetMachine>
+X("ppc32", " PowerPC 32");
+static RegisterTarget<PPC64TargetMachine>
+Y("ppc64", " PowerPC 64");
const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
if (Subtarget.isDarwin())
}
unsigned PPC32TargetMachine::getJITMatchQuality() {
-#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
+#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
if (sizeof(void*) == 4)
return 10;
#endif
return 0;
}
unsigned PPC64TargetMachine::getJITMatchQuality() {
-#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
+#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
if (sizeof(void*) == 8)
return 10;
#endif
if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
return 20;
+ // If the target triple is something non-powerpc, we don't match.
+ if (!TT.empty()) return 0;
+
if (M.getEndianness() == Module::BigEndian &&
M.getPointerSize() == Module::Pointer32)
return 10; // Weak match
: Subtarget(*this, M, FS, is64Bit),
DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
- InstrItins(Subtarget.getInstrItineraryData()) {
+ InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
- if (getRelocationModel() == Reloc::Default)
+ if (getRelocationModel() == Reloc::Default) {
if (Subtarget.isDarwin())
setRelocationModel(Reloc::DynamicNoPIC);
else
setRelocationModel(Reloc::Static);
+ }
}
+/// Override this for PowerPC. Tail merging happily breaks up instruction issue
+/// groups, which typically degrades performance.
+bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
+
PPC32TargetMachine::PPC32TargetMachine(const Module &M, const std::string &FS)
: PPCTargetMachine(M, FS, false) {
}
// Pass Pipeline Configuration
//===----------------------------------------------------------------------===//
-bool PPCTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
+bool PPCTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
// Install an instruction selector.
PM.add(createPPCISelDag(*this));
return false;
}
-bool PPCTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
+bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
// Must run branch selection immediately preceding the asm printer.
PM.add(createPPCBranchSelectionPass());
return false;
}
-bool PPCTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
+bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out) {
PM.add(createPPCAsmPrinterPass(Out, *this));
return false;
}
-bool PPCTargetMachine::addObjectWriter(FunctionPassManager &PM, bool Fast,
- std::ostream &Out) {
- // FIXME: support PPC ELF files at some point
- addPPCMachOObjectWriterPass(PM, Out, *this);
- return false;
-}
-
-bool PPCTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
- MachineCodeEmitter &MCE) {
+bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
+ bool DumpAsm, MachineCodeEmitter &MCE) {
// The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
// FIXME: This should be moved to TargetJITInfo!!
if (Subtarget.isPPC64()) {
// Machine code emitter pass for PowerPC.
PM.add(createPPCCodeEmitterPass(*this, MCE));
+ if (DumpAsm)
+ PM.add(createPPCAsmPrinterPass(*cerr.stream(), *this));
return false;
}
+bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
+ bool DumpAsm, MachineCodeEmitter &MCE) {
+ // Machine code emitter pass for PowerPC.
+ PM.add(createPPCCodeEmitterPass(*this, MCE));
+ if (DumpAsm)
+ PM.add(createPPCAsmPrinterPass(*cerr.stream(), *this));
+ return false;
+}