fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memri

[oota-llvm.git] / lib / Target / PowerPC / PPCInstrInfo.td

diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index 4c1f0dca4e80b8ca9acbfe93eb3eb3a12663dad9..480d587cfc2b745ff8df34b972b8ed9cde32b37a 100644 (file)
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -255,7 +255,7 @@ def memrr : Operand<iPTR> {
 }
 def memrix : Operand<iPTR> {   // memri where the imm is shifted 2 bits.
   let PrintMethod = "printMemRegImmShifted";
-  let MIOperandInfo = (ops i32imm, ptr_rc);
+  let MIOperandInfo = (ops i32imm:$imm, ptr_rc:$reg);
 }
 
 // PowerPC Predicate operand.  20 = (0<<5)|20 = always, CR0 is a dummy reg