add support for branch on ordered/unordered.

[oota-llvm.git] / lib / Target / PowerPC / PPCISelDAGToDAG.cpp

diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index d078bdcd5f0128e344a05f1ebfefcc5b73466a24..3d9cd8dc3fbbb79470137ed512ef935d84825a5c 100644 (file)
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -489,6 +489,15 @@ static unsigned getBCCForSetCC(ISD::CondCode CC) {
   case ISD::SETGT:  return PPC::BGT;
   case ISD::SETUGE:
   case ISD::SETGE:  return PPC::BGE;
+    
+  case ISD::SETO:   return PPC::BUN;
+  case ISD::SETUO:  return PPC::BNU;
+  case ISD::SETOEQ:
+  case ISD::SETOGT:
+  case ISD::SETOGE:
+  case ISD::SETOLT:
+  case ISD::SETOLE:
+  case ISD::SETONE: assert(0 && "Unknown condition!"); abort();
   }
   return 0;
 }
@@ -509,6 +518,14 @@ static unsigned getCRIdxForSetCC(ISD::CondCode CC, bool& Inv) {
   case ISD::SETLE:  Inv = true;   return 1;
   case ISD::SETEQ:  Inv = false;  return 2;
   case ISD::SETNE:  Inv = true;   return 2;
+  case ISD::SETO:   Inv = true;   return 3;
+  case ISD::SETUO:  Inv = false;  return 3;
+  case ISD::SETOEQ:
+  case ISD::SETOGT:
+  case ISD::SETOGE:
+  case ISD::SETOLT:
+  case ISD::SETOLE:
+  case ISD::SETONE: assert(0 && "Unknown condition!"); abort();
   }
   return 0;
 }