-//===-- PowerPCCodeEmitter.cpp - JIT Code Emitter for PowerPC -----*- C++ -*-=//
-//
+//===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=//
+//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
+//
//===----------------------------------------------------------------------===//
-//
+//
+// This file defines the PowerPC 32-bit CodeEmitter and associated machinery to
+// JIT-compile bytecode to native PowerPC.
//
//===----------------------------------------------------------------------===//
-#include "PowerPCTargetMachine.h"
+#include "PPCTargetMachine.h"
+#include "PPCRelocations.h"
+#include "PPC.h"
+#include "llvm/Module.h"
+#include "llvm/PassManager.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/Passes.h"
-#include "Support/Debug.h"
-
-namespace llvm {
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/Visibility.h"
+#include "llvm/Target/TargetOptions.h"
+#include <iostream>
+using namespace llvm;
namespace {
- class PowerPCCodeEmitter : public MachineFunctionPass {
+ class VISIBILITY_HIDDEN PPCCodeEmitter : public MachineFunctionPass {
TargetMachine &TM;
MachineCodeEmitter &MCE;
+ // Tracks which instruction references which BasicBlock
+ std::vector<std::pair<MachineBasicBlock*, unsigned*> > BBRefs;
+
+ /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
+ ///
+ int getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
+
public:
- PowerPCCodeEmitter(TargetMachine &T, MachineCodeEmitter &M)
+ PPCCodeEmitter(TargetMachine &T, MachineCodeEmitter &M)
: TM(T), MCE(M) {}
const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
///
void emitBasicBlock(MachineBasicBlock &MBB);
- /// emitWord - write a 32-bit word to memory at the current PC
+ /// getValueBit - return the particular bit of Val
///
- void emitWord(unsigned w) { MCE.emitWord(w); }
+ unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
- unsigned getValueBit(int64_t Val, unsigned bit);
-
- /// getBinaryCodeForInstr - returns the assembled code for an instruction
+ /// getBinaryCodeForInstr - This function, generated by the
+ /// CodeEmitterGenerator using TableGen, produces the binary encoding for
+ /// machine instructions.
///
- unsigned getBinaryCodeForInstr(MachineInstr &MI) { return 0; }
+ unsigned getBinaryCodeForInstr(MachineInstr &MI);
};
}
/// of functions. This method should returns true if machine code emission is
/// not supported.
///
-bool PowerPCTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
- MachineCodeEmitter &MCE) {
+bool PPCTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
+ MachineCodeEmitter &MCE) {
// Machine code emitter pass for PowerPC
- PM.add(new PowerPCCodeEmitter(*this, MCE));
- // Delete machine code for this function after emitting it:
+ PM.add(new PPCCodeEmitter(*this, MCE));
+ // Delete machine code for this function after emitting it
PM.add(createMachineCodeDeleter());
- // We don't yet support machine code emission
- return true;
-}
-
-bool PowerPCCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
- MCE.startFunction(MF);
- MCE.emitConstantPool(MF.getConstantPool());
- for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
- emitBasicBlock(*I);
- MCE.finishFunction(MF);
return false;
}
-void PowerPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
- for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I)
- emitWord(getBinaryCodeForInstr(*I));
-}
+bool PPCCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
+ assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
+ MF.getTarget().getRelocationModel() != Reloc::Static) &&
+ "JIT relocation model must be set to static or default!");
+ do {
+ BBRefs.clear();
+
+ MCE.startFunction(MF);
+ for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
+ emitBasicBlock(*BB);
+ } while (MCE.finishFunction(MF));
+
+ // Resolve branches to BasicBlocks for the entire function
+ for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
+ intptr_t Location = MCE.getMachineBasicBlockAddress(BBRefs[i].first);
+ unsigned *Ref = BBRefs[i].second;
+ DEBUG(std::cerr << "Fixup @ " << (void*)Ref << " to " << (void*)Location
+ << "\n");
+ unsigned Instr = *Ref;
+ intptr_t BranchTargetDisp = (Location - (intptr_t)Ref) >> 2;
+
+ switch (Instr >> 26) {
+ default: assert(0 && "Unknown branch user!");
+ case 18: // This is B or BL
+ *Ref |= (BranchTargetDisp & ((1 << 24)-1)) << 2;
+ break;
+ case 16: // This is BLT,BLE,BEQ,BGE,BGT,BNE, or other bcx instruction
+ *Ref |= (BranchTargetDisp & ((1 << 14)-1)) << 2;
+ break;
+ }
+ }
+ BBRefs.clear();
-unsigned PowerPCCodeEmitter::getValueBit(int64_t Val, unsigned bit) {
- Val >>= bit;
- return (Val & 1);
+ return false;
}
-void *PowerPCJITInfo::getJITStubForFunction(Function *F,
- MachineCodeEmitter &MCE) {
- assert (0 && "PowerPCJITInfo::getJITStubForFunction not implemented");
- return 0;
+void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
+ MCE.StartMachineBasicBlock(&MBB);
+
+ for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
+ MachineInstr &MI = *I;
+ unsigned Opcode = MI.getOpcode();
+ switch (MI.getOpcode()) {
+ default:
+ MCE.emitWordBE(getBinaryCodeForInstr(*I));
+ break;
+ case PPC::IMPLICIT_DEF_GPRC:
+ case PPC::IMPLICIT_DEF_G8RC:
+ case PPC::IMPLICIT_DEF_F8:
+ case PPC::IMPLICIT_DEF_F4:
+ case PPC::IMPLICIT_DEF_VRRC:
+ break; // pseudo opcode, no side effects
+ case PPC::MovePCtoLR:
+ assert(0 && "CodeEmitter does not support MovePCtoLR instruction");
+ break;
+ }
+ }
}
-void PowerPCJITInfo::replaceMachineCodeForFunction (void *Old, void *New) {
- assert (0 && "PowerPCJITInfo::replaceMachineCodeForFunction not implemented");
+int PPCCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
+
+ intptr_t rv = 0; // Return value; defaults to 0 for unhandled cases
+ // or things that get fixed up later by the JIT.
+ if (MO.isRegister()) {
+ rv = PPCRegisterInfo::getRegisterNumbering(MO.getReg());
+
+ // Special encoding for MTCRF and MFOCRF, which uses a bit mask for the
+ // register, not the register number directly.
+ if ((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) &&
+ (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)) {
+ rv = 0x80 >> rv;
+ }
+ } else if (MO.isImmediate()) {
+ rv = MO.getImmedValue();
+ } else if (MO.isGlobalAddress() || MO.isExternalSymbol()) {
+ unsigned Reloc = 0;
+ if (MI.getOpcode() == PPC::BL)
+ Reloc = PPC::reloc_pcrel_bx;
+ else {
+ switch (MI.getOpcode()) {
+ default: DEBUG(MI.dump()); assert(0 && "Unknown instruction for relocation!");
+ case PPC::LIS:
+ case PPC::LIS8:
+ case PPC::ADDIS8:
+ Reloc = PPC::reloc_absolute_high; // Pointer to symbol
+ break;
+ case PPC::LI:
+ case PPC::LI8:
+ case PPC::LA:
+ // Loads.
+ case PPC::LBZ:
+ case PPC::LHA:
+ case PPC::LHZ:
+ case PPC::LWZ:
+ case PPC::LFS:
+ case PPC::LFD:
+ case PPC::LWZ8:
+
+ // Stores.
+ case PPC::STB:
+ case PPC::STH:
+ case PPC::STW:
+ case PPC::STFS:
+ case PPC::STFD:
+ Reloc = PPC::reloc_absolute_low;
+ break;
+
+ case PPC::LWA:
+ case PPC::LD:
+ case PPC::STD:
+ case PPC::STD_32:
+ Reloc = PPC::reloc_absolute_low_ix;
+ break;
+ }
+ }
+ if (MO.isGlobalAddress())
+ MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(),
+ Reloc, MO.getGlobal(), 0));
+ else
+ MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
+ Reloc, MO.getSymbolName(), 0));
+ } else if (MO.isMachineBasicBlock()) {
+ unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
+ BBRefs.push_back(std::make_pair(MO.getMachineBasicBlock(), CurrPC));
+ } else if (MO.isConstantPoolIndex() || MO.isJumpTableIndex()) {
+ if (MO.isConstantPoolIndex())
+ rv = MCE.getConstantPoolEntryAddress(MO.getConstantPoolIndex());
+ else
+ rv = MCE.getJumpTableEntryAddress(MO.getJumpTableIndex());
+
+ unsigned Opcode = MI.getOpcode();
+ if (Opcode == PPC::LIS || Opcode == PPC::LIS8 ||
+ Opcode == PPC::ADDIS || Opcode == PPC::ADDIS8) {
+ // lis wants hi16(addr)
+ if ((short)rv < 0) rv += 1 << 16;
+ rv >>= 16;
+ } else if (Opcode == PPC::LWZ || Opcode == PPC::LWZ8 ||
+ Opcode == PPC::LA ||
+ Opcode == PPC::LI || Opcode == PPC::LI8 ||
+ Opcode == PPC::LFS || Opcode == PPC::LFD) {
+ // These load opcodes want lo16(addr)
+ rv &= 0xffff;
+ } else {
+ MI.dump();
+ assert(0 && "Unknown constant pool or jump table using instruction!");
+ }
+ } else {
+ std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
+ abort();
+ }
+
+ return rv;
}
-//#include "PowerPCGenCodeEmitter.inc"
-
-} // end llvm namespace
+#include "PPCGenCodeEmitter.inc"
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