// HasMips3_32 - The subset of MIPS-III instructions added to MIPS32
bool HasMips3_32;
+ // HasMips3_32r2 - The subset of MIPS-III instructions added to MIPS32r2
+ bool HasMips3_32r2;
+
// HasMips4_32 - Has the subset of MIPS-IV present in MIPS32
bool HasMips4_32;
// HasMips4_32r2 - Has the subset of MIPS-IV present in MIPS32r2
bool HasMips4_32r2;
+ // HasMips5_32r2 - Has the subset of MIPS-V present in MIPS32r2
+ bool HasMips5_32r2;
+
// InMips16 -- can process Mips16 instructions
bool InMips16Mode;
/// \brief Reset the subtarget for the Mips target.
void resetSubtarget(MachineFunction *MF);
-
+ /// Does the system support unaligned memory access.
+ ///
+ /// MIPS32r6/MIPS64r6 require full unaligned access support but does not
+ /// specify which component of the system provides it. Hardware, software, and
+ /// hybrid implementations are all valid.
+ bool systemSupportsUnalignedAccess() const { return hasMips32r6(); }
};
} // End llvm namespace