Implement fastcc calling convention for MIPS.

[oota-llvm.git] / lib / Target / Mips / MipsMachineFunction.cpp

diff --git a/lib/Target/Mips/MipsMachineFunction.cpp b/lib/Target/Mips/MipsMachineFunction.cpp
index 8535b290b43876f82e2ebbca2d4c38b14e864867..e3746d4a42097c289150852a0cc3db0d6eee8964 100644 (file)
--- a/lib/Target/Mips/MipsMachineFunction.cpp
+++ b/lib/Target/Mips/MipsMachineFunction.cpp
@@ -22,10 +22,6 @@ static cl::opt<bool>
 FixGlobalBaseReg("mips-fix-global-base-reg", cl::Hidden, cl::init(true),
                  cl::desc("Always use $gp as the global base register."));
 
-bool MipsFunctionInfo::globalBaseRegFixed() const {
-  return FixGlobalBaseReg;
-}
-
 bool MipsFunctionInfo::globalBaseRegSet() const {
   return GlobalBaseReg;
 }
@@ -37,9 +33,6 @@ unsigned MipsFunctionInfo::getGlobalBaseReg() {
 
   const MipsSubtarget &ST = MF.getTarget().getSubtarget<MipsSubtarget>();
 
-  if (FixGlobalBaseReg && ST.isABI_O32()) // $gp is the global base register.
-    return GlobalBaseReg = Mips::GP;
-
   const TargetRegisterClass *RC = ST.isABI_N64() ?
     (const TargetRegisterClass*)&Mips::CPU64RegsRegClass :
     (const TargetRegisterClass*)&Mips::CPURegsRegClass;