Add patterns for unaligned load and store instructions and enable the

[oota-llvm.git] / lib / Target / Mips / MipsAsmPrinter.cpp

diff --git a/lib/Target/Mips/MipsAsmPrinter.cpp b/lib/Target/Mips/MipsAsmPrinter.cpp
index 96d8643fc35c7adedda4a74b2c416635d365904e..e6beb56dc56387e6820cc268d71aa589428691c5 100644 (file)
--- a/lib/Target/Mips/MipsAsmPrinter.cpp
+++ b/lib/Target/Mips/MipsAsmPrinter.cpp
@@ -44,6 +44,11 @@
 
 using namespace llvm;
 
+static bool isUnalignedLoadStore(unsigned Opc) {
+  return Opc == Mips::ULW || Opc == Mips::ULH || Opc == Mips::ULHu ||
+         Opc == Mips::USW || Opc == Mips::USH;
+}
+
 void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
   SmallString<128> Str;
   raw_svector_ostream OS(Str);
@@ -58,29 +63,15 @@ void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
   MCInst TmpInst0;
   MCInstLowering.Lower(MI, TmpInst0);
   
-  // Convert aligned loads/stores to their unaligned counterparts.
-  if (!MI->memoperands_empty()) {
-    unsigned NaturalAlignment, UnalignedOpc;
-    
-    switch (Opc) {
-    case Mips::LW:  NaturalAlignment = 4; UnalignedOpc = Mips::ULW;  break;
-    case Mips::SW:  NaturalAlignment = 4; UnalignedOpc = Mips::USW;  break;
-    case Mips::LH:  NaturalAlignment = 2; UnalignedOpc = Mips::ULH;  break;
-    case Mips::LHu: NaturalAlignment = 2; UnalignedOpc = Mips::ULHu; break;
-    case Mips::SH:  NaturalAlignment = 2; UnalignedOpc = Mips::USH;  break;
-    default:        NaturalAlignment = 0;
-    }
-
-    if ((*MI->memoperands_begin())->getAlignment() < NaturalAlignment) {
-      MCInst Directive;
-      Directive.setOpcode(Mips::MACRO);
-      OutStreamer.EmitInstruction(Directive);
-      TmpInst0.setOpcode(UnalignedOpc);
-      OutStreamer.EmitInstruction(TmpInst0);
-      Directive.setOpcode(Mips::NOMACRO);
-      OutStreamer.EmitInstruction(Directive);
-      return;
-    }
+  // Enclose unaligned load or store with .macro & .nomacro directives.
+  if (isUnalignedLoadStore(Opc)) {
+    MCInst Directive;
+    Directive.setOpcode(Mips::MACRO);
+    OutStreamer.EmitInstruction(Directive);
+    OutStreamer.EmitInstruction(TmpInst0);
+    Directive.setOpcode(Mips::NOMACRO);
+    OutStreamer.EmitInstruction(Directive);
+    return;
   }
 
   OutStreamer.EmitInstruction(TmpInst0);