[mips][mips64r6] Added mul/mulu/muh/muhu
[oota-llvm.git] / lib / Target / Mips / Mips64r6InstrInfo.td
index bf15ef62eb8adf93b8a25c7b63fe1ef275143d27..9607f751aa07a320aa759b2c222045cf565cbfd6 100644 (file)
 // Removed: div, divu
 // Removed: ldl, ldr, ldle, ldre, sdl, sdr, sdle, sdre
 
+//===----------------------------------------------------------------------===//
+//
+// Instruction Encodings
+//
+//===----------------------------------------------------------------------===//
+
+class DMUH_ENC    : SPECIAL_3R_FM<0b00011, 0b111000>;
+class DMUHU_ENC   : SPECIAL_3R_FM<0b00011, 0b111001>;
+class DMUL_R6_ENC : SPECIAL_3R_FM<0b00010, 0b111000>;
+class DMULU_ENC   : SPECIAL_3R_FM<0b00010, 0b111001>;
+
+//===----------------------------------------------------------------------===//
+//
+// Instruction Descriptions
+//
+//===----------------------------------------------------------------------===//
+
+class DMUH_DESC    : MUL_R6_DESC_BASE<"dmuh", GPR64Opnd>;
+class DMUHU_DESC   : MUL_R6_DESC_BASE<"dmuhu", GPR64Opnd>;
+class DMUL_R6_DESC : MUL_R6_DESC_BASE<"dmul", GPR64Opnd>;
+class DMULU_DESC   : MUL_R6_DESC_BASE<"dmulu", GPR64Opnd>;
+
+//===----------------------------------------------------------------------===//
+//
+// Instruction Definitions
+//
+//===----------------------------------------------------------------------===//
+
 def DAHI;
 def DALIGN;
 def DATI;
@@ -29,8 +57,8 @@ def DDIVU;
 // def DLSA; // See MSA
 def DMOD;
 def DMODU;
-def DMUH;
-def DMUHU;
-def DMUL_R6; // Not to be confused with the old mul
-def DMULU;
+def DMUH: DMUH_ENC, DMUH_DESC, ISA_MIPS64R6;
+def DMUHU: DMUHU_ENC, DMUHU_DESC, ISA_MIPS64R6;
+def DMUL_R6: DMUL_R6_ENC, DMUL_R6_DESC, ISA_MIPS64R6;
+def DMULU: DMULU_ENC, DMULU_DESC, ISA_MIPS64R6;
 def LDPC;