let EncoderMethod = "getUImm4AndValue";
}
+def immSExtAddius5 : ImmLeaf<i32, [{return Imm >= -8 && Imm <= 7;}]>;
+
def immZExtAndi16 : ImmLeaf<i32,
[{return (Imm == 128 || (Imm >= 1 && Imm <= 4) || Imm == 7 || Imm == 8 ||
Imm == 15 || Imm == 16 || Imm == 31 || Imm == 32 || Imm == 63 ||
MicroMipsInst16<(outs RO:$dst), (ins RO:$rd, simm4:$imm),
!strconcat(opstr, "\t$rd, $imm"), [], NoItinerary, FrmR> {
let Constraints = "$rd = $dst";
- let isCommutable = 1;
}
class AddImmUR1SP<string opstr, RegisterOperand RO> :
// MicroMips arbitrary patterns that map to one or more instructions
//===----------------------------------------------------------------------===//
+def : MipsPat<(add GPR32:$src, immSExtAddius5:$imm),
+ (ADDIUS5_MM GPR32:$src, immSExtAddius5:$imm)>;
+def : MipsPat<(add GPR32:$src, immSExt16:$imm),
+ (ADDiu_MM GPR32:$src, immSExt16:$imm)>;
+
def : MipsPat<(and GPRMM16:$src, immZExtAndi16:$imm),
(ANDI16_MM GPRMM16:$src, immZExtAndi16:$imm)>;
def : MipsPat<(and GPR32:$src, immZExt16:$imm),