class MCSubtargetInfo;
class StringRef;
class Target;
+class Triple;
class raw_ostream;
class raw_pwrite_stream;
MCContext &Ctx);
MCAsmBackend *createMipsAsmBackendEB32(const Target &T,
- const MCRegisterInfo &MRI, StringRef TT,
- StringRef CPU);
+ const MCRegisterInfo &MRI,
+ const Triple &TT, StringRef CPU);
MCAsmBackend *createMipsAsmBackendEL32(const Target &T,
- const MCRegisterInfo &MRI, StringRef TT,
- StringRef CPU);
+ const MCRegisterInfo &MRI,
+ const Triple &TT, StringRef CPU);
MCAsmBackend *createMipsAsmBackendEB64(const Target &T,
- const MCRegisterInfo &MRI, StringRef TT,
- StringRef CPU);
+ const MCRegisterInfo &MRI,
+ const Triple &TT, StringRef CPU);
MCAsmBackend *createMipsAsmBackendEL64(const Target &T,
- const MCRegisterInfo &MRI, StringRef TT,
- StringRef CPU);
+ const MCRegisterInfo &MRI,
+ const Triple &TT, StringRef CPU);
MCObjectWriter *createMipsELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI,
bool IsLittleEndian, bool Is64Bit);