Fix PR1749 and InstCombine/2007-10-28-EmptyField.ll by handling

[oota-llvm.git] / lib / Target / IA64 / IA64InstrInfo.cpp

diff --git a/lib/Target/IA64/IA64InstrInfo.cpp b/lib/Target/IA64/IA64InstrInfo.cpp
index b5116c264255fc659b483487e4c692754398faf0..a66c9bc6bbba8e99cd42d4c2477bf49bc1277052 100644 (file)
--- a/lib/Target/IA64/IA64InstrInfo.cpp
+++ b/lib/Target/IA64/IA64InstrInfo.cpp
@@ -19,7 +19,8 @@
 using namespace llvm;
 
 IA64InstrInfo::IA64InstrInfo()
-  : TargetInstrInfo(IA64Insts, sizeof(IA64Insts)/sizeof(IA64Insts[0])) {
+  : TargetInstrInfo(IA64Insts, sizeof(IA64Insts)/sizeof(IA64Insts[0])),
+    RI(*this) {
 }
 
 
@@ -28,7 +29,8 @@ bool IA64InstrInfo::isMoveInstr(const MachineInstr& MI,
                                unsigned& destReg) const {
   MachineOpCode oc = MI.getOpcode();
   if (oc == IA64::MOV || oc == IA64::FMOV) {
-     assert(MI.getNumOperands() == 2 &&
+  // TODO: this doesn't detect predicate moves
+     assert(MI.getNumOperands() >= 2 &&
              /* MI.getOperand(0).isRegister() &&
              MI.getOperand(1).isRegister() && */
              "invalid register-register move instruction");
@@ -45,3 +47,12 @@ bool IA64InstrInfo::isMoveInstr(const MachineInstr& MI,
                 // move instruction
 }
 
+unsigned
+IA64InstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB,
+                            MachineBasicBlock *FBB,
+                            const std::vector<MachineOperand> &Cond)const {
+  // Can only insert uncond branches so far.
+  assert(Cond.empty() && !FBB && TBB && "Can only handle uncond branches!");
+  BuildMI(&MBB, get(IA64::BRL_NOTCALL)).addMBB(TBB);
+  return 1;
+}