//
// The LLVM Compiler Infrastructure
//
-// This file was developed by Duraid Madina and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
//
//===----------------------------------------------------------------------===//
+#define DEBUG_TYPE "ia64-codegen"
#include "IA64.h"
#include "IA64TargetMachine.h"
#include "IA64ISelLowering.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/Target/TargetOptions.h"
-#include "llvm/ADT/Statistic.h"
#include "llvm/Constants.h"
#include "llvm/GlobalValue.h"
#include "llvm/Intrinsics.h"
+#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
-#include <iostream>
#include <queue>
#include <set>
using namespace llvm;
namespace {
- Statistic<> FusedFP ("ia64-codegen", "Number of fused fp operations");
- Statistic<> FrameOff("ia64-codegen", "Number of frame idx offsets collapsed");
-
//===--------------------------------------------------------------------===//
/// IA64DAGToDAGISel - IA64 specific code to select IA64 machine
/// instructions for SelectionDAG operations.
// load the branch target's entry point [mem] and
// GP value [mem+8]
SDOperand targetEntryPoint=
- SDOperand(CurDAG->getTargetNode(IA64::LD8, MVT::i64, FnDescriptor), 0);
+ SDOperand(CurDAG->getTargetNode(IA64::LD8, MVT::i64, MVT::Other,
+ FnDescriptor), 0);
Chain = targetEntryPoint.getValue(1);
SDOperand targetGPAddr=
SDOperand(CurDAG->getTargetNode(IA64::ADDS, MVT::i64,
- FnDescriptor, CurDAG->getConstant(8, MVT::i64)), 0);
+ FnDescriptor,
+ CurDAG->getConstant(8, MVT::i64)), 0);
Chain = targetGPAddr.getValue(1);
- SDOperand targetGP=
- SDOperand(CurDAG->getTargetNode(IA64::LD8, MVT::i64, targetGPAddr), 0);
+ SDOperand targetGP =
+ SDOperand(CurDAG->getTargetNode(IA64::LD8, MVT::i64,MVT::Other,
+ targetGPAddr), 0);
Chain = targetGP.getValue(1);
Chain = CurDAG->getCopyToReg(Chain, IA64::r1, targetGP, InFlag);
SDOperand Chain = CurDAG->getEntryNode(); // this is a constant, so..
SDOperand V;
- if (cast<ConstantFPSDNode>(N)->isExactlyValue(+0.0)) {
+ ConstantFPSDNode* N2 = cast<ConstantFPSDNode>(N);
+ if (N2->getValueAPF().isPosZero()) {
V = CurDAG->getCopyFromReg(Chain, IA64::F0, MVT::f64);
- } else if (cast<ConstantFPSDNode>(N)->isExactlyValue(+1.0)) {
+ } else if (N2->isExactlyValue(N2->getValueType(0) == MVT::f32 ?
+ APFloat(+1.0f) : APFloat(+1.0))) {
V = CurDAG->getCopyFromReg(Chain, IA64::F1, MVT::f64);
} else
assert(0 && "Unexpected FP constant!");
int FI = cast<FrameIndexSDNode>(N)->getIndex();
if (N->hasOneUse())
return CurDAG->SelectNodeTo(N, IA64::MOV, MVT::i64,
- CurDAG->getTargetFrameIndex(FI, MVT::i64));
+ CurDAG->getTargetFrameIndex(FI, MVT::i64));
else
return CurDAG->getTargetNode(IA64::MOV, MVT::i64,
CurDAG->getTargetFrameIndex(FI, MVT::i64));
}
case ISD::ConstantPool: { // TODO: nuke the constant pool
- // (ia64 doesn't need one)
+ // (ia64 doesn't need one)
ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
Constant *C = CP->getConstVal();
SDOperand CPI = CurDAG->getTargetConstantPool(C, MVT::i64,
case ISD::GlobalAddress: {
GlobalValue *GV = cast<GlobalAddressSDNode>(N)->getGlobal();
SDOperand GA = CurDAG->getTargetGlobalAddress(GV, MVT::i64);
- SDOperand Tmp = SDOperand(CurDAG->getTargetNode(IA64::ADDL_GA, MVT::i64,
- CurDAG->getRegister(IA64::r1, MVT::i64), GA), 0);
+ SDOperand Tmp =
+ SDOperand(CurDAG->getTargetNode(IA64::ADDL_GA, MVT::i64,
+ CurDAG->getRegister(IA64::r1,
+ MVT::i64), GA), 0);
return CurDAG->getTargetNode(IA64::LD8, MVT::i64, Tmp);
}
-/* XXX case ISD::ExternalSymbol: {
- SDOperand EA = CurDAG->getTargetExternalSymbol(cast<ExternalSymbolSDNode>(N)->getSymbol(),
- MVT::i64);
- SDOperand Tmp = CurDAG->getTargetNode(IA64::ADDL_EA, MVT::i64,
- CurDAG->getRegister(IA64::r1, MVT::i64), EA);
- return CurDAG->getTargetNode(IA64::LD8, MVT::i64, Tmp);
- }
+/* XXX
+ case ISD::ExternalSymbol: {
+ SDOperand EA = CurDAG->getTargetExternalSymbol(
+ cast<ExternalSymbolSDNode>(N)->getSymbol(),
+ MVT::i64);
+ SDOperand Tmp = CurDAG->getTargetNode(IA64::ADDL_EA, MVT::i64,
+ CurDAG->getRegister(IA64::r1,
+ MVT::i64),
+ EA);
+ return CurDAG->getTargetNode(IA64::LD8, MVT::i64, Tmp);
+ }
*/
case ISD::LOAD: { // FIXME: load -1, not 1, for bools?
AddToISelQueue(Chain);
AddToISelQueue(Address);
- MVT::ValueType TypeBeingLoaded = LD->getLoadedVT();
+ MVT::ValueType TypeBeingLoaded = LD->getMemoryVT();
unsigned Opc;
switch (TypeBeingLoaded) {
default:
#ifndef NDEBUG
- N->dump();
+ N->dump(CurDAG);
#endif
assert(0 && "Cannot load this type!");
case MVT::i1: { // this is a bool
default: assert(0 && "unknown type in store");
case MVT::i1: { // this is a bool
Opc = IA64::ST1; // we store either 0 or 1 as a byte
- // first load zero!
- SDOperand Initial = CurDAG->getCopyFromReg(Chain, IA64::r0, MVT::i64);
- Chain = Initial.getValue(1);
- // then load 1 into the same reg iff the predicate to store is 1
+ // first load zero!
+ SDOperand Initial = CurDAG->getCopyFromReg(Chain, IA64::r0, MVT::i64);
+ Chain = Initial.getValue(1);
+ // then load 1 into the same reg iff the predicate to store is 1
SDOperand Tmp = ST->getValue();
AddToISelQueue(Tmp);
- Tmp = SDOperand(CurDAG->getTargetNode(IA64::TPCADDS, MVT::i64, Initial,
- CurDAG->getTargetConstant(1, MVT::i64),
- Tmp), 0);
+ Tmp =
+ SDOperand(CurDAG->getTargetNode(IA64::TPCADDS, MVT::i64, Initial,
+ CurDAG->getTargetConstant(1, MVT::i64),
+ Tmp), 0);
return CurDAG->SelectNodeTo(N, Opc, MVT::Other, Address, Tmp, Chain);
}
case MVT::i64: Opc = IA64::ST8; break;
case MVT::f64: Opc = IA64::STF8; break;
}
} else { // Truncating store
- switch(ST->getStoredVT()) {
+ switch(ST->getMemoryVT()) {
default: assert(0 && "unknown type in truncstore");
case MVT::i8: Opc = IA64::ST1; break;
case MVT::i16: Opc = IA64::ST2; break;
case ISD::CALLSEQ_END: {
int64_t Amt = cast<ConstantSDNode>(N->getOperand(1))->getValue();
unsigned Opc = N->getOpcode() == ISD::CALLSEQ_START ?
- IA64::ADJUSTCALLSTACKDOWN : IA64::ADJUSTCALLSTACKUP;
+ IA64::ADJUSTCALLSTACKDOWN : IA64::ADJUSTCALLSTACKUP;
SDOperand N0 = N->getOperand(0);
AddToISelQueue(N0);
return CurDAG->SelectNodeTo(N, Opc, MVT::Other, getI64Imm(Amt), N0);
}
case ISD::BR:
- // FIXME: we don't need long branches all the time!
+ // FIXME: we don't need long branches all the time!
SDOperand N0 = N->getOperand(0);
AddToISelQueue(N0);
return CurDAG->SelectNodeTo(N, IA64::BRL_NOTCALL, MVT::Other,
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