#ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONBASEINFO_H
#define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONBASEINFO_H
-#include "HexagonMCTargetDesc.h"\r
-#include "llvm/Support/ErrorHandling.h"\r
-\r
-#include <stdint.h>\r
-\r
-namespace llvm {\r
-\r
-/// HexagonII - This namespace holds all of the target specific flags that\r
+#include "HexagonMCTargetDesc.h"
+#include "llvm/Support/ErrorHandling.h"
+#include <stdint.h>
+
+namespace llvm {
+
+/// HexagonII - This namespace holds all of the target specific flags that
/// instruction info tracks.
///
namespace HexagonII {
TypeXTYPE = 8,
TypeMEMOP = 9,
TypeNV = 10,
+ TypeDUPLEX = 11,
TypePREFIX = 30, // Such as extenders.
TypeENDLOOP = 31 // Such as end of a HW loop.
};
PostInc = 6 // Post increment addressing mode
};
- enum MemAccessSize {
+ enum class MemAccessSize {
NoMemAccess = 0, // Not a memory acces instruction.
ByteAccess = 1, // Byte access instruction (memb).
HalfWordAccess = 2, // Half word access instruction (memh).
MO_LO16, MO_HI16,
// Offset from the base of the SDA.
- MO_GPREL\r
- };\r
-\r
- enum class InstParseBits : uint32_t {\r
- INST_PARSE_MASK = 0x0000c000,\r
- INST_PARSE_PACKET_END = 0x0000c000,\r
- INST_PARSE_LOOP_END = 0x00008000,\r
- INST_PARSE_NOT_END = 0x00004000,\r
- INST_PARSE_DUPLEX = 0x00000000,\r
- INST_PARSE_EXTENDER = 0x00000000\r
- };\r
-\r
-} // End namespace HexagonII.\r
-\r
-} // End namespace llvm.\r
+ MO_GPREL
+ };
+
+ // Hexagon Sub-instruction classes.
+ enum SubInstructionGroup {
+ HSIG_None = 0,
+ HSIG_L1,
+ HSIG_L2,
+ HSIG_S1,
+ HSIG_S2,
+ HSIG_A,
+ HSIG_Compound
+ };
+
+ // Hexagon Compound classes.
+ enum CompoundGroup {
+ HCG_None = 0,
+ HCG_A,
+ HCG_B,
+ HCG_C
+ };
+
+ enum InstParseBits {
+ INST_PARSE_MASK = 0x0000c000,
+ INST_PARSE_PACKET_END = 0x0000c000,
+ INST_PARSE_LOOP_END = 0x00008000,
+ INST_PARSE_NOT_END = 0x00004000,
+ INST_PARSE_DUPLEX = 0x00000000,
+ INST_PARSE_EXTENDER = 0x00000000
+ };
+
+} // End namespace HexagonII.
+
+} // End namespace llvm.
#endif