[Hexagon] Converting XTYPE/SHIFT intrinsics. Cleaning out old intrinsic patterns...

[oota-llvm.git] / lib / Target / Hexagon / HexagonInstrInfoV3.td

diff --git a/lib/Target/Hexagon/HexagonInstrInfoV3.td b/lib/Target/Hexagon/HexagonInstrInfoV3.td
index 0f2fd84cd45873eb3d1a76864ef1ccf4aa0cfd6e..c1ddb3a7c5682b72997ce962bfdcb8d4d24753a2 100644 (file)
--- a/lib/Target/Hexagon/HexagonInstrInfoV3.td
+++ b/lib/Target/Hexagon/HexagonInstrInfoV3.td
@@ -224,6 +224,12 @@ def M2_vrcmpys_s1_h: T_vrcmpRaw<"hi", 0b101>;
 def M2_vrcmpys_s1_l: T_vrcmpRaw<"lo", 0b111>;
 }
 
+// Assembler mapped to M2_vrcmpys_s1_h or M2_vrcmpys_s1_l
+let hasSideEffects = 0 in
+def M2_vrcmpys_s1
+ : MInst<(outs DoubleRegs:$Rdd), (ins DoubleRegs:$Rss, IntRegs:$Rt),
+ "$Rdd=vrcmpys($Rss,$Rt):<<1:sat">;
+
 // Vector reduce complex multiply by scalar with accumulation.
 let Defs = [USR_OVF], hasSideEffects = 0 in
 class T_vrcmpys_acc<string HiLo, bits<3>MajOp>:
@@ -250,11 +256,25 @@ def M2_vrcmpys_acc_s1_h: T_vrcmpys_acc<"hi", 0b101>;
 def M2_vrcmpys_acc_s1_l: T_vrcmpys_acc<"lo", 0b111>;
 }
 
+// Assembler mapped to M2_vrcmpys_acc_s1_h or M2_vrcmpys_acc_s1_l
+
+def M2_vrcmpys_acc_s1
+  : MInst <(outs DoubleRegs:$dst),
+           (ins DoubleRegs:$dst2, DoubleRegs:$src1, IntRegs:$src2),
+           "$dst += vrcmpys($src1, $src2):<<1:sat", [],
+           "$dst2 = $dst">;
+
 let isCodeGenOnly = 0 in {
 def M2_vrcmpys_s1rp_h : T_MType_vrcmpy <"vrcmpys", 0b101, 0b110, 1>;
 def M2_vrcmpys_s1rp_l : T_MType_vrcmpy <"vrcmpys", 0b101, 0b111, 0>;
 }
 
+// Assembler mapped to M2_vrcmpys_s1rp_h or M2_vrcmpys_s1rp_l
+def M2_vrcmpys_s1rp
+  : MInst <(outs IntRegs:$Rd), (ins DoubleRegs:$Rss, IntRegs:$Rt),
+  "$Rd=vrcmpys($Rss,$Rt):<<1:rnd:sat">;
+
+
 // S2_cabacdecbin: Cabac decode bin.
 let Defs = [P0], isPredicateLate = 1, Itinerary = S_3op_tc_1_SLOT23,
     isCodeGenOnly = 0 in