CMake: Builds all targets.

[oota-llvm.git] / lib / Target / Alpha / AlphaCodeEmitter.cpp

diff --git a/lib/Target/Alpha/AlphaCodeEmitter.cpp b/lib/Target/Alpha/AlphaCodeEmitter.cpp
index 15de348ee4e31124fbb98056a86f9d45ef8a8727..b51440932f7964f21486ffae7efa970842ae6c35 100644 (file)
--- a/lib/Target/Alpha/AlphaCodeEmitter.cpp
+++ b/lib/Target/Alpha/AlphaCodeEmitter.cpp
@@ -2,8 +2,8 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
@@ -12,6 +12,7 @@
 //
 //===----------------------------------------------------------------------===//
 
+#define DEBUG_TYPE "alpha-emitter"
 #include "AlphaTargetMachine.h"
 #include "AlphaRelocations.h"
 #include "Alpha.h"
@@ -22,15 +23,8 @@
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/Function.h"
 #include "llvm/Support/Debug.h"
-#include "llvm/ADT/Statistic.h"
-#include <iostream>
 using namespace llvm;
 
-namespace {
-  Statistic<>
-  NumEmitted("alpha-emitter", "Number of machine instructions emitted");
-}
-
 namespace {
   class AlphaCodeEmitter : public MachineFunctionPass {
     const AlphaInstrInfo  *II;
@@ -39,14 +33,16 @@ namespace {
 
     /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
     ///
-    int getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
+    unsigned getMachineOpValue(const MachineInstr &MI,
+                               const MachineOperand &MO);
 
   public:
+    static char ID;
     explicit AlphaCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce)
-      : II(0), TM(tm), MCE(mce) {}
+      : MachineFunctionPass(&ID), II(0), TM(tm), MCE(mce) {}
     AlphaCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce,
                      const AlphaInstrInfo& ii)
-      : II(&ii), TM(tm), MCE(mce) {}
+      : MachineFunctionPass(&ID), II(&ii), TM(tm), MCE(mce) {}
 
     bool runOnMachineFunction(MachineFunction &MF);
 
@@ -60,12 +56,13 @@ namespace {
     /// CodeEmitterGenerator using TableGen, produces the binary encoding for
     /// machine instructions.
     ///
-    unsigned getBinaryCodeForInstr(MachineInstr &MI);
+    unsigned getBinaryCodeForInstr(const MachineInstr &MI);
 
   private:
     void emitBasicBlock(MachineBasicBlock &MBB);
 
   };
+  char AlphaCodeEmitter::ID = 0;
 }
 
 /// createAlphaCodeEmitterPass - Return a pass that emits the collected Alpha code
@@ -91,7 +88,7 @@ void AlphaCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
   MCE.StartMachineBasicBlock(&MBB);
   for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
        I != E; ++I) {
-    MachineInstr &MI = *I;
+    const MachineInstr &MI = *I;
     switch(MI.getOpcode()) {
     default:
       MCE.emitWordLE(getBinaryCodeForInstr(*I));
@@ -99,9 +96,7 @@ void AlphaCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
     case Alpha::ALTENT:
     case Alpha::PCLABEL:
     case Alpha::MEMLABEL:
-    case Alpha::IDEF_I:
-    case Alpha::IDEF_F32:
-    case Alpha::IDEF_F64:
+    case TargetInstrInfo::IMPLICIT_DEF:
       break; //skip these
     }
   }
@@ -147,18 +142,19 @@ static unsigned getAlphaRegNumber(unsigned Reg) {
   }
 }
 
-int AlphaCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
+unsigned AlphaCodeEmitter::getMachineOpValue(const MachineInstr &MI,
+                                             const MachineOperand &MO) {
 
-  int rv = 0; // Return value; defaults to 0 for unhandled cases
-              // or things that get fixed up later by the JIT.
+  unsigned rv = 0; // Return value; defaults to 0 for unhandled cases
+                   // or things that get fixed up later by the JIT.
 
   if (MO.isRegister()) {
     rv = getAlphaRegNumber(MO.getReg());
   } else if (MO.isImmediate()) {
-    rv = MO.getImmedValue();
+    rv = MO.getImm();
   } else if (MO.isGlobalAddress() || MO.isExternalSymbol()
              || MO.isConstantPoolIndex()) {
-    DEBUG(std::cerr << MO << " is a relocated op for " << MI << "\n";);
+    DOUT << MO << " is a relocated op for " << MI << "\n";
     unsigned Reloc = 0;
     int Offset = 0;
     bool useGOT = false;
@@ -191,7 +187,7 @@ int AlphaCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
     case Alpha::LDAg:
     case Alpha::LDAHg:
       Reloc = Alpha::reloc_gpdist;
-      Offset = MI.getOperand(3).getImmedValue();
+      Offset = MI.getOperand(3).getImm();
       break;
     default:
       assert(0 && "unknown relocatable instruction");
@@ -199,22 +195,21 @@ int AlphaCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
     }
     if (MO.isGlobalAddress())
       MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(),
-                                          Reloc, MO.getGlobal(), Offset,
-                                          false, useGOT));
+                                                 Reloc, MO.getGlobal(), Offset,
+                                                 isa<Function>(MO.getGlobal()),
+                                                 useGOT));
     else if (MO.isExternalSymbol())
       MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
-                                          Reloc, MO.getSymbolName(), Offset,
-                                          true));
+                                                     Reloc, MO.getSymbolName(),
+                                                     Offset, true));
     else
-    MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
-                                          Reloc, MO.getConstantPoolIndex(),
-                                          Offset));
+     MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
+                                          Reloc, MO.getIndex(), Offset));
   } else if (MO.isMachineBasicBlock()) {
     MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
-                                               Alpha::reloc_bsr,
-                                               MO.getMachineBasicBlock()));
+                                               Alpha::reloc_bsr, MO.getMBB()));
   }else {
-    std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
+    cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
     abort();
   }