//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
//
//===----------------------------------------------------------------------===//
+#define DEBUG_TYPE "alpha-emitter"
#include "AlphaTargetMachine.h"
#include "AlphaRelocations.h"
#include "Alpha.h"
#include "llvm/PassManager.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
+#include "llvm/CodeGen/JITCodeEmitter.h"
+#include "llvm/CodeGen/ObjectCodeEmitter.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Function.h"
#include "llvm/Support/Debug.h"
-#include "llvm/ADT/Statistic.h"
-#include <iostream>
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
using namespace llvm;
namespace {
- Statistic<>
- NumEmitted("alpha-emitter", "Number of machine instructions emitted");
-}
-namespace {
- class AlphaCodeEmitter : public MachineFunctionPass {
- const AlphaInstrInfo *II;
- MachineCodeEmitter &MCE;
- std::vector<std::pair<MachineBasicBlock *, unsigned*> > BBRefs;
+ class AlphaCodeEmitter {
+ MachineCodeEmitter &MCE;
+ public:
+ AlphaCodeEmitter(MachineCodeEmitter &mce) : MCE(mce) {}
+
+ /// getBinaryCodeForInstr - This function, generated by the
+ /// CodeEmitterGenerator using TableGen, produces the binary encoding for
+ /// machine instructions.
+
+ unsigned getBinaryCodeForInstr(const MachineInstr &MI);
/// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
- ///
- int getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
+
+ unsigned getMachineOpValue(const MachineInstr &MI,
+ const MachineOperand &MO);
+ };
+
+ template <class CodeEmitter>
+ class Emitter : public MachineFunctionPass, public AlphaCodeEmitter
+ {
+ const AlphaInstrInfo *II;
+ TargetMachine &TM;
+ CodeEmitter &MCE;
public:
- explicit AlphaCodeEmitter(MachineCodeEmitter &mce) : II(0), MCE(mce) {}
- AlphaCodeEmitter(MachineCodeEmitter &mce, const AlphaInstrInfo& ii)
- : II(&ii), MCE(mce) {}
+ static char ID;
+ explicit Emitter(TargetMachine &tm, CodeEmitter &mce)
+ : MachineFunctionPass(&ID), AlphaCodeEmitter(mce),
+ II(0), TM(tm), MCE(mce) {}
+ Emitter(TargetMachine &tm, CodeEmitter &mce, const AlphaInstrInfo& ii)
+ : MachineFunctionPass(&ID), AlphaCodeEmitter(mce),
+ II(&ii), TM(tm), MCE(mce) {}
bool runOnMachineFunction(MachineFunction &MF);
return "Alpha Machine Code Emitter";
}
- void emitInstruction(const MachineInstr &MI);
-
- /// getBinaryCodeForInstr - This function, generated by the
- /// CodeEmitterGenerator using TableGen, produces the binary encoding for
- /// machine instructions.
- ///
- unsigned getBinaryCodeForInstr(MachineInstr &MI);
-
private:
void emitBasicBlock(MachineBasicBlock &MBB);
-
};
+
+ template <class CodeEmitter>
+ char Emitter<CodeEmitter>::ID = 0;
}
-/// createAlphaCodeEmitterPass - Return a pass that emits the collected Alpha code
-/// to the specified MCE object.
-FunctionPass *llvm::createAlphaCodeEmitterPass(MachineCodeEmitter &MCE) {
- return new AlphaCodeEmitter(MCE);
+/// createAlphaCodeEmitterPass - Return a pass that emits the collected Alpha
+/// code to the specified MCE object.
+
+FunctionPass *llvm::createAlphaCodeEmitterPass(AlphaTargetMachine &TM,
+ MachineCodeEmitter &MCE) {
+ return new Emitter<MachineCodeEmitter>(TM, MCE);
}
-bool AlphaCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
+FunctionPass *llvm::createAlphaJITCodeEmitterPass(AlphaTargetMachine &TM,
+ JITCodeEmitter &JCE) {
+ return new Emitter<JITCodeEmitter>(TM, JCE);
+}
+FunctionPass *llvm::createAlphaObjectCodeEmitterPass(AlphaTargetMachine &TM,
+ ObjectCodeEmitter &OCE) {
+ return new Emitter<ObjectCodeEmitter>(TM, OCE);
+}
+
+template <class CodeEmitter>
+bool Emitter<CodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
II = ((AlphaTargetMachine&)MF.getTarget()).getInstrInfo();
do {
- BBRefs.clear();
-
MCE.startFunction(MF);
for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
emitBasicBlock(*I);
} while (MCE.finishFunction(MF));
- // Resolve all forward branches now...
- for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
- unsigned* Location =
- (unsigned*)MCE.getMachineBasicBlockAddress(BBRefs[i].first);
- unsigned* Ref = (unsigned*)BBRefs[i].second;
- intptr_t BranchTargetDisp =
- (((unsigned char*)Location - (unsigned char*)Ref) >> 2) - 1;
- DEBUG(std::cerr << "Fixup @ " << (void*)Ref << " to " << (void*)Location
- << " Disp " << BranchTargetDisp
- << " using " << (BranchTargetDisp & ((1 << 22)-1)) << "\n");
- *Ref |= (BranchTargetDisp & ((1 << 21)-1));
- }
- BBRefs.clear();
return false;
}
-void AlphaCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
+template <class CodeEmitter>
+void Emitter<CodeEmitter>::emitBasicBlock(MachineBasicBlock &MBB) {
MCE.StartMachineBasicBlock(&MBB);
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
I != E; ++I) {
- MachineInstr &MI = *I;
- unsigned Opcode = MI.getOpcode();
+ const MachineInstr &MI = *I;
+ MCE.processDebugLoc(MI.getDebugLoc(), true);
switch(MI.getOpcode()) {
default:
MCE.emitWordLE(getBinaryCodeForInstr(*I));
case Alpha::ALTENT:
case Alpha::PCLABEL:
case Alpha::MEMLABEL:
- case Alpha::IDEF_I:
- case Alpha::IDEF_F32:
- case Alpha::IDEF_F64:
+ case TargetInstrInfo::IMPLICIT_DEF:
+ case TargetInstrInfo::KILL:
break; //skip these
}
+ MCE.processDebugLoc(MI.getDebugLoc(), false);
}
}
case Alpha::R30 : case Alpha::F30 : return 30;
case Alpha::R31 : case Alpha::F31 : return 31;
default:
- assert(0 && "Unhandled reg");
- abort();
+ llvm_unreachable("Unhandled reg");
}
}
-int AlphaCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
+unsigned AlphaCodeEmitter::getMachineOpValue(const MachineInstr &MI,
+ const MachineOperand &MO) {
- int rv = 0; // Return value; defaults to 0 for unhandled cases
- // or things that get fixed up later by the JIT.
+ unsigned rv = 0; // Return value; defaults to 0 for unhandled cases
+ // or things that get fixed up later by the JIT.
- if (MO.isRegister()) {
+ if (MO.isReg()) {
rv = getAlphaRegNumber(MO.getReg());
- } else if (MO.isImmediate()) {
- rv = MO.getImmedValue();
- } else if (MO.isGlobalAddress() || MO.isExternalSymbol()
- || MO.isConstantPoolIndex()) {
- DEBUG(std::cerr << MO << " is a relocated op for " << MI << "\n";);
- bool isExternal = MO.isExternalSymbol() ||
- (MO.isGlobalAddress() &&
- ( MO.getGlobal()->hasWeakLinkage() ||
- MO.getGlobal()->isExternal()) );
+ } else if (MO.isImm()) {
+ rv = MO.getImm();
+ } else if (MO.isGlobal() || MO.isSymbol() || MO.isCPI()) {
+ DEBUG(errs() << MO << " is a relocated op for " << MI << "\n");
unsigned Reloc = 0;
int Offset = 0;
bool useGOT = false;
case Alpha::LDAg:
case Alpha::LDAHg:
Reloc = Alpha::reloc_gpdist;
- Offset = MI.getOperand(3).getImmedValue();
+ Offset = MI.getOperand(3).getImm();
break;
default:
- assert(0 && "unknown relocatable instruction");
- abort();
+ llvm_unreachable("unknown relocatable instruction");
}
- if (MO.isGlobalAddress())
+ if (MO.isGlobal())
MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(),
- Reloc, MO.getGlobal(), Offset,
- false, useGOT));
- else if (MO.isExternalSymbol())
+ Reloc, MO.getGlobal(), Offset,
+ isa<Function>(MO.getGlobal()),
+ useGOT));
+ else if (MO.isSymbol())
MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
- Reloc, MO.getSymbolName(), Offset,
- true));
+ Reloc, MO.getSymbolName(),
+ Offset, true));
else
- MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
- Reloc, MO.getConstantPoolIndex(),
- Offset));
- } else if (MO.isMachineBasicBlock()) {
- unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
- BBRefs.push_back(std::make_pair(MO.getMachineBasicBlock(), CurrPC));
- }else {
- std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
- abort();
+ MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
+ Reloc, MO.getIndex(), Offset));
+ } else if (MO.isMBB()) {
+ MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
+ Alpha::reloc_bsr, MO.getMBB()));
+ } else {
+#ifndef NDEBUG
+ errs() << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
+#endif
+ llvm_unreachable(0);
}
return rv;
}
-
#include "AlphaGenCodeEmitter.inc"
-
projects / oota-llvm.git / blobdiff