//===---------------------------------------------------------------------===//
-We compiles the following:
+We compile the following:
define i16 @func_entry_2E_ce(i32 %i) {
switch i32 %i, label %bb12.exitStub [
mov r1, #1
lsl r1, r1, #8
tst r2, r1
-
//===---------------------------------------------------------------------===//
objects are referenced off the frame pointer with negative offsets. See
oggenc for an example.
-
//===---------------------------------------------------------------------===//
Poor codegen test/CodeGen/ARM/select.ll f7:
//===---------------------------------------------------------------------===//
-Add ldmia, stmia support.
-
-//===---------------------------------------------------------------------===//
-
Thumb load / store address mode offsets are scaled. The values kept in the
instruction operands are pre-scale values. This probably ought to be changed
to avoid extra work when we convert Thumb2 instructions to Thumb1 instructions.
Rather than having tBR_JTr print a ".align 2" and constant island pass pad it,
add a target specific ALIGN instruction instead. That way, GetInstSizeInBytes
won't have to over-estimate. It can also be used for loop alignment pass.
+
+//===---------------------------------------------------------------------===//
+
+We generate conditional code for icmp when we don't need to. This code:
+
+ int foo(int s) {
+ return s == 1;
+ }
+
+produces:
+
+foo:
+ cmp r0, #1
+ mov.w r0, #0
+ it eq
+ moveq r0, #1
+ bx lr
+
+when it could use subs + adcs. This is GCC PR46975.