//===----------------------------------------------------------------------===//
#include "ARMTargetMachine.h"
-#include "ARMTargetAsmInfo.h"
+#include "ARMMCAsmInfo.h"
#include "ARMFrameInfo.h"
#include "ARM.h"
-#include "llvm/Module.h"
#include "llvm/PassManager.h"
#include "llvm/CodeGen/Passes.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/Target/TargetMachineRegistry.h"
+#include "llvm/Support/FormattedStream.h"
#include "llvm/Target/TargetOptions.h"
+#include "llvm/Target/TargetRegistry.h"
using namespace llvm;
-static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
- cl::desc("Disable load store optimization pass"));
-static cl::opt<bool> DisableIfConversion("disable-arm-if-conversion",cl::Hidden,
- cl::desc("Disable if-conversion pass"));
-
-// Register the target.
-static RegisterTarget<ARMTargetMachine> X("arm", " ARM");
-static RegisterTarget<ThumbTargetMachine> Y("thumb", " Thumb");
-
-// No assembler printer by default
-ARMTargetMachine::AsmPrinterCtorFn ARMTargetMachine::AsmPrinterCtor = 0;
-
-/// ThumbTargetMachine - Create an Thumb architecture model.
-///
-unsigned ThumbTargetMachine::getJITMatchQuality() {
-#if defined(__thumb__)
- return 10;
-#endif
- return 0;
+static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
+ Triple TheTriple(TT);
+ switch (TheTriple.getOS()) {
+ case Triple::Darwin:
+ return new ARMMCAsmInfoDarwin();
+ default:
+ return new ARMELFMCAsmInfo();
+ }
}
-unsigned ThumbTargetMachine::getModuleMatchQuality(const Module &M) {
- std::string TT = M.getTargetTriple();
- if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "thumb-")
- return 20;
-
- // If the target triple is something non-thumb, we don't match.
- if (!TT.empty()) return 0;
-
- if (M.getEndianness() == Module::LittleEndian &&
- M.getPointerSize() == Module::Pointer32)
- return 10; // Weak match
- else if (M.getEndianness() != Module::AnyEndianness ||
- M.getPointerSize() != Module::AnyPointerSize)
- return 0; // Match for some other target
-
- return getJITMatchQuality()/2;
-}
+extern "C" void LLVMInitializeARMTarget() {
+ // Register the target.
+ RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
+ RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget);
-ThumbTargetMachine::ThumbTargetMachine(const Module &M, const std::string &FS)
- : ARMTargetMachine(M, FS, true) {
+ // Register the target asm info.
+ RegisterAsmInfoFn A(TheARMTarget, createMCAsmInfo);
+ RegisterAsmInfoFn B(TheThumbTarget, createMCAsmInfo);
}
/// TargetMachine ctor - Create an ARM architecture model.
///
-ARMTargetMachine::ARMTargetMachine(const Module &M, const std::string &FS,
- bool isThumb)
- : Subtarget(M, FS, isThumb),
- DataLayout(Subtarget.isAPCS_ABI() ?
- // APCS ABI
- (isThumb ?
- std::string("e-p:32:32-f64:32:32-i64:32:32-"
- "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
- std::string("e-p:32:32-f64:32:32-i64:32:32")) :
- // AAPCS ABI
- (isThumb ?
- std::string("e-p:32:32-f64:64:64-i64:64:64-"
- "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
- std::string("e-p:32:32-f64:64:64-i64:64:64"))),
- InstrInfo(Subtarget),
+ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
+ const std::string &TT,
+ const std::string &FS,
+ bool isThumb)
+ : LLVMTargetMachine(T, TT),
+ Subtarget(TT, FS, isThumb),
FrameInfo(Subtarget),
- JITInfo(*this),
- TLInfo(*this) {}
-
-unsigned ARMTargetMachine::getJITMatchQuality() {
-#if defined(__arm__)
- return 10;
-#endif
- return 0;
+ JITInfo(),
+ InstrItins(Subtarget.getInstrItineraryData()) {
+ DefRelocModel = getRelocationModel();
}
-unsigned ARMTargetMachine::getModuleMatchQuality(const Module &M) {
- std::string TT = M.getTargetTriple();
- if (TT.size() >= 4 && // Match arm-foo-bar, as well as things like armv5blah-*
- (TT.substr(0, 4) == "arm-" || TT.substr(0, 4) == "armv"))
- return 20;
- // If the target triple is something non-arm, we don't match.
- if (!TT.empty()) return 0;
-
- if (M.getEndianness() == Module::LittleEndian &&
- M.getPointerSize() == Module::Pointer32)
- return 10; // Weak match
- else if (M.getEndianness() != Module::AnyEndianness ||
- M.getPointerSize() != Module::AnyPointerSize)
- return 0; // Match for some other target
-
- return getJITMatchQuality()/2;
+ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
+ const std::string &FS)
+ : ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget),
+ DataLayout(Subtarget.isAPCS_ABI() ?
+ std::string("e-p:32:32-f64:32:32-i64:32:32-"
+ "v128:32:128-v64:32:64-n32") :
+ std::string("e-p:32:32-f64:64:64-i64:64:64-"
+ "v128:64:128-v64:64:64-n32")),
+ TLInfo(*this),
+ TSInfo(*this) {
}
-
-const TargetAsmInfo *ARMTargetMachine::createTargetAsmInfo() const {
- switch (Subtarget.TargetType) {
- case ARMSubtarget::isDarwin:
- return new ARMDarwinTargetAsmInfo(*this);
- case ARMSubtarget::isELF:
- return new ARMELFTargetAsmInfo(*this);
- default:
- return new ARMTargetAsmInfo(*this);
- }
+ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
+ const std::string &FS)
+ : ARMBaseTargetMachine(T, TT, FS, true),
+ InstrInfo(Subtarget.hasThumb2()
+ ? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget))
+ : ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))),
+ DataLayout(Subtarget.isAPCS_ABI() ?
+ std::string("e-p:32:32-f64:32:32-i64:32:32-"
+ "i16:16:32-i8:8:32-i1:8:32-"
+ "v128:32:128-v64:32:64-a:0:32-n32") :
+ std::string("e-p:32:32-f64:64:64-i64:64:64-"
+ "i16:16:32-i8:8:32-i1:8:32-"
+ "v128:64:128-v64:64:64-a:0:32-n32")),
+ TLInfo(*this),
+ TSInfo(*this) {
}
-
// Pass Pipeline Configuration
-bool ARMTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
- PM.add(createARMISelDag(*this));
+bool ARMBaseTargetMachine::addPreISel(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel) {
+ if (OptLevel != CodeGenOpt::None)
+ PM.add(createARMGlobalMergePass(getTargetLowering()));
+
+ return false;
+}
+
+bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel) {
+ PM.add(createARMISelDag(*this, OptLevel));
return false;
}
-bool ARMTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
- // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
- if (!Fast && !DisableLdStOpti && !Subtarget.isThumb())
- PM.add(createARMLoadStoreOptimizationPass());
+bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel) {
+ if (Subtarget.hasNEON())
+ PM.add(createNEONPreAllocPass());
- if (!Fast && !DisableIfConversion && !Subtarget.isThumb())
- PM.add(createIfConverterPass());
+ // FIXME: temporarily disabling load / store optimization pass for Thumb1.
+ if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
+ PM.add(createARMLoadStoreOptimizationPass(true));
- PM.add(createARMConstantIslandPass());
return true;
}
-bool ARMTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- std::ostream &Out) {
- // Output assembly language.
- assert(AsmPrinterCtor && "AsmPrinter was not linked in");
- if (AsmPrinterCtor)
- PM.add(AsmPrinterCtor(Out, *this));
+bool ARMBaseTargetMachine::addPreSched2(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel) {
+ // FIXME: temporarily disabling load / store optimization pass for Thumb1.
+ if (OptLevel != CodeGenOpt::None) {
+ if (!Subtarget.isThumb1Only())
+ PM.add(createARMLoadStoreOptimizationPass());
+ if (Subtarget.hasNEON())
+ PM.add(createNEONMoveFixPass());
+ }
- return false;
-}
+ // Expand some pseudo instructions into multiple instructions to allow
+ // proper scheduling.
+ PM.add(createARMExpandPseudoPass());
+ if (OptLevel != CodeGenOpt::None) {
+ if (!Subtarget.isThumb1Only())
+ PM.add(createIfConverterPass());
+ }
+ if (Subtarget.isThumb2())
+ PM.add(createThumb2ITBlockPass());
-bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
- bool DumpAsm, MachineCodeEmitter &MCE) {
- // FIXME: Move this to TargetJITInfo!
- setRelocationModel(Reloc::Static);
+ return true;
+}
- // Machine code emitter pass for ARM.
- PM.add(createARMCodeEmitterPass(*this, MCE));
- if (DumpAsm) {
- assert(AsmPrinterCtor && "AsmPrinter was not linked in");
- if (AsmPrinterCtor)
- PM.add(AsmPrinterCtor(*cerr.stream(), *this));
- }
+bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel) {
+ if (Subtarget.isThumb2() && !Subtarget.prefers32BitThumb())
+ PM.add(createThumb2SizeReductionPass());
- return false;
+ PM.add(createARMConstantIslandPass());
+ return true;
}
-bool ARMTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
- bool DumpAsm, MachineCodeEmitter &MCE) {
- // Machine code emitter pass for ARM.
- PM.add(createARMCodeEmitterPass(*this, MCE));
- if (DumpAsm) {
- assert(AsmPrinterCtor && "AsmPrinter was not linked in");
- if (AsmPrinterCtor)
- PM.add(AsmPrinterCtor(*cerr.stream(), *this));
- }
+bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ JITCodeEmitter &JCE) {
+ // FIXME: Move this to TargetJITInfo!
+ if (DefRelocModel == Reloc::Default)
+ setRelocationModel(Reloc::Static);
+ // Machine code emitter pass for ARM.
+ PM.add(createARMJITCodeEmitterPass(*this, JCE));
return false;
}
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