/// NoARM - True if subtarget does not support ARM mode execution.
bool NoARM;
- /// IsR9Reserved - True if R9 is a not available as general purpose register.
- bool IsR9Reserved;
+ /// ReserveR9 - True if R9 is not available as a general purpose register.
+ bool ReserveR9;
- /// UseMovt - True if MOVT / MOVW pairs are used for materialization of 32-bit
- /// imms (including global addresses).
- bool UseMovt;
+ /// NoMovt - True if MOVT / MOVW pairs are not used for materialization of
+ /// 32-bit imms (including global addresses).
+ bool NoMovt;
/// SupportsTailCall - True if the OS supports tail call. The dynamic linker
/// must be able to synthesize call stubs for interworking between ARM and
/// particularly effective at zeroing a VFP register.
bool HasZeroCycleZeroing;
- /// AllowsUnalignedMem - If true, the subtarget allows unaligned memory
+ /// StrictAlign - If true, the subtarget disallows unaligned memory
/// accesses for some types. For details, see
/// ARMTargetLowering::allowsMisalignedMemoryAccesses().
- bool AllowsUnalignedMem;
+ bool StrictAlign;
/// RestrictIT - If true, the subtarget disallows generation of deprecated IT
/// blocks to conform to ARMv8 rule.
/// NaCl TRAP instruction is generated instead of the regular TRAP.
bool UseNaClTrap;
+ /// Generate calls via indirect call instructions.
+ bool GenLongCalls;
+
/// Target machine allowed unsafe FP math (such as use of NEON fp)
bool UnsafeFPMath;
bool hasMPExtension() const { return HasMPExtension; }
bool hasThumb2DSP() const { return Thumb2DSP; }
bool useNaClTrap() const { return UseNaClTrap; }
+ bool genLongCalls() const { return GenLongCalls; }
bool hasFP16() const { return HasFP16; }
bool hasD16() const { return HasD16; }
bool isRClass() const { return ARMProcClass == RClass; }
bool isAClass() const { return ARMProcClass == AClass; }
- bool isV6M() const {
- return isThumb1Only() && isMClass();
+ bool isR9Reserved() const {
+ return isTargetMachO() ? (ReserveR9 || !HasV6Ops) : ReserveR9;
}
- bool isR9Reserved() const { return IsR9Reserved; }
+ bool useStride4VFPs(const MachineFunction &MF) const;
bool useMovt(const MachineFunction &MF) const;
bool supportsTailCall() const { return SupportsTailCall; }
- bool allowsUnalignedMem() const { return AllowsUnalignedMem; }
+ bool allowsUnalignedMem() const { return !StrictAlign; }
bool restrictIT() const { return RestrictIT; }
/// compiler runtime or math libraries.
bool hasSinCos() const;
+ /// Returns true if machine scheduler should be enabled.
+ bool enableMachineScheduler() const override;
+
/// True for some subtargets at > -O0.
bool enablePostRAScheduler() const override;