ARM itinerary properties.

[oota-llvm.git] / lib / Target / ARM / ARMScheduleA8.td

diff --git a/lib/Target/ARM/ARMScheduleA8.td b/lib/Target/ARM/ARMScheduleA8.td
index 8b1fb9386ad53c097835dbdd750153c3867c21cd..eb1083ca23f3a2329242e7747e8d06ae43674775 100644 (file)
--- a/lib/Target/ARM/ARMScheduleA8.td
+++ b/lib/Target/ARM/ARMScheduleA8.td
@@ -22,7 +22,11 @@ def A8_NLSPipe : FuncUnit; // NEON LS pipe
 //
 // Dual issue pipeline represented by A8_Pipe0 | A8_Pipe1
 //
-def CortexA8Itineraries : ProcessorItineraries<
+def CortexA8Itineraries : MultiIssueItineraries<
+  2,  // IssueWidth
+  -1, // MinLatency - OperandCycles are interpreted as MinLatency.
+  2,  // LoadLatency - overriden by OperandCycles.
+  10, // HighLatency - currently unused.
   [A8_Pipe0, A8_Pipe1, A8_LSPipe, A8_NPipe, A8_NLSPipe],
   [], [
   // Two fully-pipelined integer ALU pipelines