Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning.

[oota-llvm.git] / lib / Target / ARM / ARMInstrThumb.td

diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td
index cceba8f6b4c5ec52f96928c6a27bb563b1bfb30e..af6eca044a54a957372382e6e845891882b8be66 100644 (file)
--- a/lib/Target/ARM/ARMInstrThumb.td
+++ b/lib/Target/ARM/ARMInstrThumb.td
@@ -192,7 +192,7 @@ let isBranch = 1, isTerminator = 1 in
 //  Load Store Instructions.
 //
 
-let isSimpleLoad = 1 in
+let canFoldAsLoad = 1 in
 def tLDR : TI4<(outs GPR:$dst), (ins t_addrmode_s4:$addr),
                "ldr $dst, $addr",
                [(set GPR:$dst, (load t_addrmode_s4:$addr))]>;
@@ -213,25 +213,25 @@ def tLDRSH : TI2<(outs GPR:$dst), (ins t_addrmode_rr:$addr),
                  "ldrsh $dst, $addr",
                  [(set GPR:$dst, (sextloadi16 t_addrmode_rr:$addr))]>;
 
-let isSimpleLoad = 1 in
+let canFoldAsLoad = 1 in
 def tLDRspi : TIs<(outs GPR:$dst), (ins t_addrmode_sp:$addr),
                   "ldr $dst, $addr",
                   [(set GPR:$dst, (load t_addrmode_sp:$addr))]>;
 
 // Special instruction for restore. It cannot clobber condition register
 // when it's expanded by eliminateCallFramePseudoInstr().
-let isSimpleLoad = 1, mayLoad = 1 in
+let canFoldAsLoad = 1, mayLoad = 1 in
 def tRestore : TIs<(outs GPR:$dst), (ins t_addrmode_sp:$addr),
                     "ldr $dst, $addr", []>;
 
 // Load tconstpool
-let isSimpleLoad = 1 in
+let canFoldAsLoad = 1 in
 def tLDRpci : TIs<(outs GPR:$dst), (ins i32imm:$addr),
                   "ldr $dst, $addr",
                   [(set GPR:$dst, (load (ARMWrapper tconstpool:$addr)))]>;
 
 // Special LDR for loads from non-pc-relative constpools.
-let isSimpleLoad = 1, mayLoad = 1, isReMaterializable = 1 in
+let canFoldAsLoad = 1, mayLoad = 1, isReMaterializable = 1 in
 def tLDRcp  : TIs<(outs GPR:$dst), (ins i32imm:$addr),
                   "ldr $dst, $addr", []>;