Generate a VTBL instruction instead of a series of loads and stores when we

[oota-llvm.git] / lib / Target / ARM / ARMISelLowering.h

diff --git a/lib/Target/ARM/ARMISelLowering.h b/lib/Target/ARM/ARMISelLowering.h
index 0f56201bcb84aa9bc9158fa23496df24b994c9ec..8eb4525b82f9ea7f151007121c919459372005b3 100644 (file)
--- a/lib/Target/ARM/ARMISelLowering.h
+++ b/lib/Target/ARM/ARMISelLowering.h
@@ -153,6 +153,10 @@ namespace llvm {
       VZIP,         // zip (interleave)
       VUZP,         // unzip (deinterleave)
       VTRN,         // transpose
+      VTBL1,        // 1-register shuffle with mask
+      VTBL2,        // 2-register shuffle with mask
+      VTBL3,        // 3-register shuffle with mask
+      VTBL4,        // 4-register shuffle with mask
 
       // Vector multiply long:
       VMULLs,       // ...signed