#ifndef TARGET_ARM_H
#define TARGET_ARM_H
+#include "llvm/Target/TargetMachine.h"
#include <cassert>
namespace llvm {
-class ARMTargetMachine;
+class ARMBaseTargetMachine;
class FunctionPass;
class MachineCodeEmitter;
+class JITCodeEmitter;
+class ObjectCodeEmitter;
class raw_ostream;
// Enums corresponding to ARM condition codes
namespace ARMCC {
- // The CondCodes constants map directly to the 4-bit encoding of the
- // condition field for predicated instructions.
+ // The CondCodes constants map directly to the 4-bit encoding of the
+ // condition field for predicated instructions.
enum CondCodes {
EQ,
NE,
LE,
AL
};
-
+
inline static CondCodes getOppositeCondition(CondCodes CC){
switch (CC) {
default: assert(0 && "Unknown condition code");
}
}
-FunctionPass *createARMISelDag(ARMTargetMachine &TM);
-FunctionPass *createARMCodePrinterPass(raw_ostream &O, ARMTargetMachine &TM);
-FunctionPass *createARMCodeEmitterPass(ARMTargetMachine &TM,
+FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM);
+FunctionPass *createARMCodePrinterPass(raw_ostream &O,
+ ARMBaseTargetMachine &TM,
+ bool Verbose);
+FunctionPass *createARMCodeEmitterPass(ARMBaseTargetMachine &TM,
+ MachineCodeEmitter &MCE);
+
+FunctionPass *createARMCodeEmitterPass(ARMBaseTargetMachine &TM,
MachineCodeEmitter &MCE);
-FunctionPass *createARMLoadStoreOptimizationPass();
+FunctionPass *createARMJITCodeEmitterPass(ARMBaseTargetMachine &TM,
+ JITCodeEmitter &JCE);
+FunctionPass *createARMObjectCodeEmitterPass(ARMBaseTargetMachine &TM,
+ ObjectCodeEmitter &OCE);
+
+FunctionPass *createARMLoadStoreOptimizationPass(bool PreAlloc = false);
FunctionPass *createARMConstantIslandPass();
} // end namespace llvm;