//
//===----------------------------------------------------------------------===//
-#ifndef AArch64TARGETMACHINE_H
-#define AArch64TARGETMACHINE_H
+#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H
+#define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H
#include "AArch64InstrInfo.h"
#include "AArch64Subtarget.h"
class AArch64TargetMachine : public LLVMTargetMachine {
protected:
- AArch64Subtarget Subtarget;
+ std::unique_ptr<TargetLoweringObjectFile> TLOF;
+ mutable StringMap<std::unique_ptr<AArch64Subtarget>> SubtargetMap;
public:
- AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU,
+ AArch64TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL, bool IsLittleEndian);
- const AArch64Subtarget *getSubtargetImpl() const override {
- return &Subtarget;
- }
+ ~AArch64TargetMachine() override;
+ const AArch64Subtarget *getSubtargetImpl(const Function &F) const override;
// Pass Pipeline Configuration
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
- /// \brief Register AArch64 analysis passes with a pass manager.
- void addAnalysisPasses(PassManagerBase &PM) override;
+ /// \brief Get the TargetIRAnalysis for this target.
+ TargetIRAnalysis getTargetIRAnalysis() override;
+
+ TargetLoweringObjectFile* getObjFileLowering() const override {
+ return TLOF.get();
+ }
+
+private:
+ bool isLittle;
};
// AArch64leTargetMachine - AArch64 little endian target machine.
class AArch64leTargetMachine : public AArch64TargetMachine {
virtual void anchor();
public:
- AArch64leTargetMachine(const Target &T, StringRef TT, StringRef CPU,
+ AArch64leTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL);
class AArch64beTargetMachine : public AArch64TargetMachine {
virtual void anchor();
public:
- AArch64beTargetMachine(const Target &T, StringRef TT, StringRef CPU,
+ AArch64beTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL);