Migrate the AArch64 TargetRegisterInfo to its TargetMachine

[oota-llvm.git] / lib / Target / AArch64 / AArch64Subtarget.cpp

diff --git a/lib/Target/AArch64/AArch64Subtarget.cpp b/lib/Target/AArch64/AArch64Subtarget.cpp
index c6130253dd89c9a5073a3d4de294b8e8b83bd793..7b04b1a735034b40bdd1ff8fd5c70235a3f64c84 100644 (file)
--- a/lib/Target/AArch64/AArch64Subtarget.cpp
+++ b/lib/Target/AArch64/AArch64Subtarget.cpp
@@ -14,6 +14,7 @@
 #include "AArch64InstrInfo.h"
 #include "AArch64PBQPRegAlloc.h"
 #include "AArch64Subtarget.h"
+#include "AArch64TargetMachine.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/CodeGen/MachineScheduler.h"
 #include "llvm/IR/GlobalValue.h"
@@ -45,12 +46,13 @@ AArch64Subtarget::initializeSubtargetDependencies(StringRef FS) {
 AArch64Subtarget::AArch64Subtarget(const std::string &TT,
                                    const std::string &CPU,
                                    const std::string &FS,
-                                   const TargetMachine &TM, bool LittleEndian)
+                                   const AArch64TargetMachine &TM,
+                                   bool LittleEndian)
     : AArch64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
       HasFPARMv8(false), HasNEON(false), HasCrypto(false), HasCRC(false),
       HasZeroCycleRegMove(false), HasZeroCycleZeroing(false),
-      IsLittle(LittleEndian), CPUString(CPU), TargetTriple(TT), FrameLowering(),
-      InstrInfo(initializeSubtargetDependencies(FS)),
+      IsLittle(LittleEndian), CPUString(CPU), TargetTriple(TT), TM(TM),
+      FrameLowering(), InstrInfo(initializeSubtargetDependencies(FS)),
       TSInfo(TM.getDataLayout()), TLInfo(TM, *this) {}
 
 /// ClassifyGlobalReference - Find the target operand flags that describe
@@ -129,3 +131,7 @@ AArch64Subtarget::getCustomPBQPConstraints() const {
 
   return llvm::make_unique<A57ChainingConstraint>();
 }
+
+const AArch64RegisterInfo *AArch64Subtarget::getRegisterInfo() const {
+  return getTargetMachine().getRegisterInfo();
+}