MF.getSubtarget().getRegisterInfo());
const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
MachineModuleInfo &MMI = MF.getMMI();
- AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();\r
- bool needsFrameMoves = MMI.hasDebugInfo() || Fn->needsUnwindTableEntry();\r
- bool HasFP = hasFP(MF);\r
-\r
- // Debug location must be unknown since the first debug location is used\r
- // to determine the end of the prologue.\r
- DebugLoc DL;\r
-\r
- // All calls are tail calls in GHC calling conv, and functions have no\r
- // prologue/epilogue.\r
+ AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
+ bool needsFrameMoves = MMI.hasDebugInfo() || Fn->needsUnwindTableEntry();
+ bool HasFP = hasFP(MF);
+
+ // Debug location must be unknown since the first debug location is used
+ // to determine the end of the prologue.
+ DebugLoc DL;
+
+ // All calls are tail calls in GHC calling conv, and functions have no
+ // prologue/epilogue.
if (MF.getFunction()->getCallingConv() == CallingConv::GHC)
return;
MachineFunction &MF = *MBB.getParent();
const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
unsigned Count = CSI.size();
- DebugLoc DL;\r
- assert((Count & 1) == 0 && "Odd number of callee-saved regs to spill!");\r
-\r
- for (unsigned i = 0; i < Count; i += 2) {\r
- unsigned idx = Count - i - 2;\r
- unsigned Reg1 = CSI[idx].getReg();\r
+ DebugLoc DL;
+ assert((Count & 1) == 0 && "Odd number of callee-saved regs to spill!");
+
+ for (unsigned i = 0; i < Count; i += 2) {
+ unsigned idx = Count - i - 2;
+ unsigned Reg1 = CSI[idx].getReg();
unsigned Reg2 = CSI[idx + 1].getReg();
// GPRs and FPRs are saved in pairs of 64-bit regs. We expect the CSI
// list to come in sorted by frame index so that we can issue the store