#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MachO.h"
+#include "llvm/Support/raw_ostream.h"
#include <vector>
using namespace llvm;
return nullptr;
}
+const MCSymbol &MachObjectWriter::findAliasedSymbol(const MCSymbol &Sym) const {
+ const MCSymbol *S = &Sym;
+ while (S->isVariable()) {
+ const MCExpr *Value = S->getVariableValue();
+ const auto *Ref = dyn_cast<MCSymbolRefExpr>(Value);
+ if (!Ref)
+ return *S;
+ S = &Ref->getSymbol();
+ }
+ return *S;
+}
+
void MachObjectWriter::WriteNlist(MachSymbolData &MSD,
const MCAsmLayout &Layout) {
MCSymbolData &Data = *MSD.SymbolData;
const MCSymbol *Symbol = &Data.getSymbol();
- const MCSymbol *AliasedSymbol = &Symbol->AliasedSymbol();
+ const MCSymbol *AliasedSymbol = &findAliasedSymbol(*Symbol);
uint8_t SectionIndex = MSD.SectionIndex;
uint8_t Type = 0;
uint16_t Flags = Data.getFlags();
static unsigned ComputeLinkerOptionsLoadCommandSize(
const std::vector<std::string> &Options, bool is64Bit)
{
- unsigned Size = sizeof(MachO::linker_options_command);
+ unsigned Size = sizeof(MachO::linker_option_command);
for (unsigned i = 0, e = Options.size(); i != e; ++i)
Size += Options[i].size() + 1;
return RoundUpToAlignment(Size, is64Bit ? 8 : 4);
uint64_t Start = OS.tell();
(void) Start;
- Write32(MachO::LC_LINKER_OPTIONS);
+ Write32(MachO::LC_LINKER_OPTION);
Write32(Size);
Write32(Options.size());
- uint64_t BytesWritten = sizeof(MachO::linker_options_command);
+ uint64_t BytesWritten = sizeof(MachO::linker_option_command);
for (unsigned i = 0, e = Options.size(); i != e; ++i) {
// Write each string, including the null byte.
const std::string &Option = Options[i];
assert(OS.tell() - Start == Size);
}
-
-void MachObjectWriter::RecordRelocation(const MCAssembler &Asm,
+void MachObjectWriter::RecordRelocation(MCAssembler &Asm,
const MCAsmLayout &Layout,
const MCFragment *Fragment,
- const MCFixup &Fixup,
- MCValue Target,
- bool &IsPCRel,
- uint64_t &FixedValue) {
+ const MCFixup &Fixup, MCValue Target,
+ bool &IsPCRel, uint64_t &FixedValue) {
TargetObjectWriter->RecordRelocation(this, Asm, Layout, Fragment, Fixup,
Target, FixedValue);
}
assert(Index <= 256 && "Too many sections!");
// Build the string table.
- for (MCSymbolData &SD : Asm.symbols()) {
- const MCSymbol &Symbol = SD.getSymbol();
+ for (const MCSymbol &Symbol : Asm.symbols()) {
if (!Asm.isSymbolLinkerVisible(Symbol))
continue;
// The particular order that we collect and then sort the symbols is chosen to
// match 'as'. Even though it doesn't matter for correctness, this is
// important for letting us diff .o files.
- for (MCSymbolData &SD : Asm.symbols()) {
- const MCSymbol &Symbol = SD.getSymbol();
+ for (const MCSymbol &Symbol : Asm.symbols()) {
+ MCSymbolData &SD = Symbol.getData();
// Ignore non-linker visible symbols.
if (!Asm.isSymbolLinkerVisible(Symbol))
}
// Now add the data for local symbols.
- for (MCSymbolData &SD : Asm.symbols()) {
- const MCSymbol &Symbol = SD.getSymbol();
+ for (const MCSymbol &Symbol : Asm.symbols()) {
+ MCSymbolData &SD = Symbol.getData();
// Ignore non-linker visible symbols.
if (!Asm.isSymbolLinkerVisible(Symbol))
ExternalSymbolData[i].SymbolData->setIndex(Index++);
for (unsigned i = 0, e = UndefinedSymbolData.size(); i != e; ++i)
UndefinedSymbolData[i].SymbolData->setIndex(Index++);
+
+ for (const MCSectionData &SD : Asm) {
+ std::vector<RelAndSymbol> &Relocs = Relocations[&SD];
+ for (RelAndSymbol &Rel : Relocs) {
+ if (!Rel.Sym)
+ continue;
+
+ // Set the Index and the IsExtern bit.
+ unsigned Index = Rel.Sym->getData().getIndex();
+ assert(isInt<24>(Index));
+ if (IsLittleEndian)
+ Rel.MRE.r_word1 = (Rel.MRE.r_word1 & (~0U << 24)) | Index | (1 << 27);
+ else
+ Rel.MRE.r_word1 = (Rel.MRE.r_word1 & 0xff) | Index << 8 | (1 << 4);
+ }
+ }
}
void MachObjectWriter::computeSectionAddresses(const MCAssembler &Asm,
}
}
-void MachObjectWriter::markAbsoluteVariableSymbols(MCAssembler &Asm,
- const MCAsmLayout &Layout) {
- for (MCSymbolData &SD : Asm.symbols()) {
- if (!SD.getSymbol().isVariable())
- continue;
-
- // Is the variable is a symbol difference (SA - SB + C) expression,
- // and neither symbol is external, mark the variable as absolute.
- const MCExpr *Expr = SD.getSymbol().getVariableValue();
- MCValue Value;
- if (Expr->EvaluateAsRelocatable(Value, &Layout, nullptr)) {
- if (Value.getSymA() && Value.getSymB())
- const_cast<MCSymbol*>(&SD.getSymbol())->setAbsolute();
- }
- }
-}
-
void MachObjectWriter::ExecutePostLayoutBinding(MCAssembler &Asm,
const MCAsmLayout &Layout) {
computeSectionAddresses(Asm, Layout);
// Create symbol data for any indirect symbols.
BindIndirectSymbols(Asm);
-
- // Mark symbol difference expressions in variables (from .set or = directives)
- // as absolute.
- markAbsoluteVariableSymbols(Asm, Layout);
-
- // Compute symbol table information and bind symbol indices.
- ComputeSymbolTable(Asm, LocalSymbolData, ExternalSymbolData,
- UndefinedSymbolData);
}
-bool MachObjectWriter::
-IsSymbolRefDifferenceFullyResolvedImpl(const MCAssembler &Asm,
- const MCSymbolData &DataA,
- const MCFragment &FB,
- bool InSet,
- bool IsPCRel) const {
+bool MachObjectWriter::IsSymbolRefDifferenceFullyResolvedImpl(
+ const MCAssembler &Asm, const MCSymbol &SymA, const MCFragment &FB,
+ bool InSet, bool IsPCRel) const {
if (InSet)
return true;
// - addr(atom(B)) - offset(B)
// and the offsets are not relocatable, so the fixup is fully resolved when
// addr(atom(A)) - addr(atom(B)) == 0.
- const MCSymbolData *A_Base = nullptr, *B_Base = nullptr;
-
- const MCSymbol &SA = DataA.getSymbol().AliasedSymbol();
+ const MCSymbol &SA = findAliasedSymbol(SymA);
const MCSection &SecA = SA.getSection();
const MCSection &SecB = FB.getParent()->getSection();
if (!FA)
return false;
- A_Base = FA->getAtom();
- B_Base = FB.getAtom();
-
// If the atoms are the same, they are guaranteed to have the same address.
- if (A_Base == B_Base)
+ if (FA->getAtom() == FB.getAtom())
return true;
// Otherwise, we can't prove this is fully resolved.
void MachObjectWriter::WriteObject(MCAssembler &Asm,
const MCAsmLayout &Layout) {
+ // Compute symbol table information and bind symbol indices.
+ ComputeSymbolTable(Asm, LocalSymbolData, ExternalSymbolData,
+ UndefinedSymbolData);
+
unsigned NumSections = Asm.size();
const MCAssembler::VersionMinInfoType &VersionInfo =
Layout.getAssembler().getVersionMinInfo();
uint64_t RelocTableEnd = SectionDataStart + SectionDataFileSize;
for (MCAssembler::const_iterator it = Asm.begin(),
ie = Asm.end(); it != ie; ++it) {
- std::vector<MachO::any_relocation_info> &Relocs = Relocations[it];
+ std::vector<RelAndSymbol> &Relocs = Relocations[it];
unsigned NumRelocs = Relocs.size();
uint64_t SectionStart = SectionDataStart + getSectionAddress(it);
WriteSection(Asm, Layout, *it, SectionStart, RelocTableEnd, NumRelocs);
Asm.writeSectionData(it, Layout);
uint64_t Pad = getPaddingSize(it, Layout);
- for (unsigned int i = 0; i < Pad; ++i)
- Write8(0);
+ WriteZeros(Pad);
}
// Write the extra padding.
ie = Asm.end(); it != ie; ++it) {
// Write the section relocation entries, in reverse order to match 'as'
// (approximately, the exact algorithm is more complicated than this).
- std::vector<MachO::any_relocation_info> &Relocs = Relocations[it];
+ std::vector<RelAndSymbol> &Relocs = Relocations[it];
for (unsigned i = 0, e = Relocs.size(); i != e; ++i) {
- Write32(Relocs[e - i - 1].r_word0);
- Write32(Relocs[e - i - 1].r_word1);
+ Write32(Relocs[e - i - 1].MRE.r_word0);
+ Write32(Relocs[e - i - 1].MRE.r_word1);
}
}
}
MCObjectWriter *llvm::createMachObjectWriter(MCMachObjectTargetWriter *MOTW,
- raw_ostream &OS,
+ raw_pwrite_stream &OS,
bool IsLittleEndian) {
return new MachObjectWriter(MOTW, OS, IsLittleEndian);
}
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