TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine model.

[oota-llvm.git] / lib / MC / MCSubtargetInfo.cpp

diff --git a/lib/MC/MCSubtargetInfo.cpp b/lib/MC/MCSubtargetInfo.cpp
index 47735a492de647e93b834c7a24c12ef506fc0191..34b7eeabbc82217bbed1d8ee0798dac74f5346f4 100644 (file)
--- a/lib/MC/MCSubtargetInfo.cpp
+++ b/lib/MC/MCSubtargetInfo.cpp
@@ -24,6 +24,9 @@ MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS,
                                      const SubtargetFeatureKV *PF,
                                      const SubtargetFeatureKV *PD,
                                      const SubtargetInfoKV *ProcSched,
+                                     const MCWriteProcResEntry *WPR,
+                                     const MCWriteLatencyEntry *WL,
+                                     const MCReadAdvanceEntry *RA,
                                      const InstrStage *IS,
                                      const unsigned *OC,
                                      const unsigned *FP,
@@ -32,6 +35,10 @@ MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS,
   ProcFeatures = PF;
   ProcDesc = PD;
   ProcSchedModels = ProcSched;
+  WriteProcResTable = WPR;
+  WriteLatencyTable = WL;
+  ReadAdvanceTable = RA;
+
   Stages = IS;
   OperandCycles = OC;
   ForwardingPaths = FP;
@@ -41,8 +48,9 @@ MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS,
   SubtargetFeatures Features(FS);
   FeatureBits = Features.getFeatureBits(CPU, ProcDesc, NumProcs,
                                         ProcFeatures, NumFeatures);
-}
 
+  CPUSchedModel = getSchedModelForCPU(CPU);
+}
 
 /// ReInitMCSubtargetInfo - Change CPU (and optionally supplemented with
 /// feature string) and recompute feature bits.