ARM: correct handling of .fpu directive
[oota-llvm.git] / lib / DebugInfo / DWARFDebugRangeList.cpp
index 1806beee72853149e3156b1c25cb36dc91ea36da..ce60deb57eeb87dcc6e9765b414521e7d1d08c34 100644 (file)
@@ -7,7 +7,7 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "DWARFDebugRangeList.h"
+#include "llvm/DebugInfo/DWARFDebugRangeList.h"
 #include "llvm/Support/Format.h"
 #include "llvm/Support/raw_ostream.h"
 
@@ -45,23 +45,25 @@ bool DWARFDebugRangeList::extract(DataExtractor data, uint32_t *offset_ptr) {
 }
 
 void DWARFDebugRangeList::dump(raw_ostream &OS) const {
-  for (int i = 0, n = Entries.size(); i != n; ++i) {
+  for (const RangeListEntry &RLE : Entries) {
     const char *format_str = (AddressSize == 4
                               ? "%08x %08"  PRIx64 " %08"  PRIx64 "\n"
                               : "%08x %016" PRIx64 " %016" PRIx64 "\n");
-    OS << format(format_str, Offset, Entries[i].StartAddress,
-                                     Entries[i].EndAddress);
+    OS << format(format_str, Offset, RLE.StartAddress, RLE.EndAddress);
   }
   OS << format("%08x <End of list>\n", Offset);
 }
 
-bool DWARFDebugRangeList::containsAddress(uint64_t BaseAddress,
-                                          uint64_t Address) const {
-  for (int i = 0, n = Entries.size(); i != n; ++i) {
-    if (Entries[i].isBaseAddressSelectionEntry(AddressSize))
-      BaseAddress = Entries[i].EndAddress;
-    else if (Entries[i].containsAddress(BaseAddress, Address))
-      return true;
+DWARFAddressRangesVector
+DWARFDebugRangeList::getAbsoluteRanges(uint64_t BaseAddress) const {
+  DWARFAddressRangesVector Res;
+  for (const RangeListEntry &RLE : Entries) {
+    if (RLE.isBaseAddressSelectionEntry(AddressSize)) {
+      BaseAddress = RLE.EndAddress;
+    } else {
+      Res.push_back(std::make_pair(BaseAddress + RLE.StartAddress,
+                                   BaseAddress + RLE.EndAddress));
+    }
   }
-  return false;
+  return Res;
 }