class MachineRegisterInfo;
class TargetInstrInfo;
class TargetRegisterInfo;
+ class raw_ostream;
class VirtRegMap : public MachineFunctionPass {
public:
void print(std::ostream &OS, const Module* M = 0) const;
void print(std::ostream *OS) const { if (OS) print(*OS); }
+ void print(raw_ostream &OS, const Module* M = 0) const;
+ void print(raw_ostream *OS) const { if (OS) print(*OS); }
void dump() const;
};
VRM.print(OS);
return OS;
}
+ inline raw_ostream *operator<<(raw_ostream *OS, const VirtRegMap &VRM) {
+ VRM.print(OS);
+ return OS;
+ }
+ inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
+ VRM.print(OS);
+ return OS;
+ }
} // End llvm namespace
#endif