Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack

[oota-llvm.git] / lib / CodeGen / TwoAddressInstructionPass.cpp

diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp
index dfbc4a730faf25e224849cb6a832fff0926e4b80..b8d38dc229ef4b6e15fb145824988c2ae258df3b 100644 (file)
--- a/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -50,7 +50,7 @@ STATISTIC(NumConvertedTo3Addr, "Number of instructions promoted to 3-address");
 namespace {
   struct VISIBILITY_HIDDEN TwoAddressInstructionPass
    : public MachineFunctionPass {
-    static const char ID; // Pass identifcation, replacement for typeid
+    static char ID; // Pass identification, replacement for typeid
     TwoAddressInstructionPass() : MachineFunctionPass((intptr_t)&ID) {}
 
     virtual void getAnalysisUsage(AnalysisUsage &AU) const;
@@ -59,7 +59,7 @@ namespace {
     bool runOnMachineFunction(MachineFunction&);
   };
 
-  const char TwoAddressInstructionPass::ID = 0;
+  char TwoAddressInstructionPass::ID = 0;
   RegisterPass<TwoAddressInstructionPass>
   X("twoaddressinstruction", "Two-Address instruction pass");
 }
@@ -143,7 +143,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
             // so, swap the B and C operands.  This makes the live ranges of A
             // and C joinable.
             // FIXME: This code also works for A := B op C instructions.
-            if ((TID->Flags & M_COMMUTABLE) && mi->getNumOperands() == 3) {
+            if ((TID->Flags & M_COMMUTABLE) && mi->getNumOperands() >= 3) {
               assert(mi->getOperand(3-si).isRegister() &&
                      "Not a proper commutative instruction!");
               unsigned regC = mi->getOperand(3-si).getReg();
@@ -171,7 +171,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
 
             // If this instruction is potentially convertible to a true
             // three-address instruction,
-            if (TID->Flags & M_CONVERTIBLE_TO_3_ADDR)
+            if (TID->Flags & M_CONVERTIBLE_TO_3_ADDR) {
               // FIXME: This assumes there are no more operands which are tied
               // to another register.
 #ifndef NDEBUG
@@ -188,11 +188,12 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
                 // Done with this instruction.
                 break;
               }
+            }
           }
 
         InstructionRearranged:
           const TargetRegisterClass* rc = MF.getSSARegMap()->getRegClass(regA);
-          MRI.copyRegToReg(*mbbi, mi, regA, regB, rc);
+          MRI.copyRegToReg(*mbbi, mi, regA, regB, rc, rc);
 
           MachineBasicBlock::iterator prevMi = prior(mi);
           DOUT << "\t\tprepend:\t"; DEBUG(prevMi->print(*cerr.stream(), &TM));
@@ -201,6 +202,10 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
           LiveVariables::VarInfo& varInfo = LV.getVarInfo(regA);
           varInfo.DefInst = prevMi;
 
+          // update live variables for regB
+          LiveVariables::VarInfo& varInfoB = LV.getVarInfo(regB);
+          // regB is used in this BB.
+          varInfoB.UsedBlocks[mbbi->getNumber()] = true;
           if (LV.removeVirtualRegisterKilled(regB, mbbi, mi))
             LV.addVirtualRegisterKilled(regB, prevMi);