add bitcode alias support

[oota-llvm.git] / lib / CodeGen / TwoAddressInstructionPass.cpp

diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp
index 932542dd21d7bcd28c24669e7b005d82a860f45e..b14a95e406c5eba273111bdca144446799d0137a 100644 (file)
--- a/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -41,17 +41,13 @@
 #include "llvm/Support/Compiler.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/ADT/STLExtras.h"
-#include <iostream>
 using namespace llvm;
 
-namespace {
-  static Statistic NumTwoAddressInstrs("twoaddressinstruction",
-                                  "Number of two-address instructions");
-  static Statistic NumCommuted("twoaddressinstruction",
-                          "Number of instructions commuted to coalesce");
-  static Statistic NumConvertedTo3Addr("twoaddressinstruction",
-                                "Number of instructions promoted to 3-address");
+STATISTIC(NumTwoAddressInstrs, "Number of two-address instructions");
+STATISTIC(NumCommuted        , "Number of instructions commuted to coalesce");
+STATISTIC(NumConvertedTo3Addr, "Number of instructions promoted to 3-address");
 
+namespace {
   struct VISIBILITY_HIDDEN TwoAddressInstructionPass
    : public MachineFunctionPass {
     virtual void getAnalysisUsage(AnalysisUsage &AU) const;
@@ -102,7 +98,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
 
         if (FirstTied) {
           ++NumTwoAddressInstrs;
-          DOUT << '\t'; DEBUG(mi->print(std::cerr, &TM));
+          DOUT << '\t'; DEBUG(mi->print(*cerr.stream(), &TM));
         }
         FirstTied = false;
 
@@ -195,13 +191,12 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
           MRI.copyRegToReg(*mbbi, mi, regA, regB, rc);
 
           MachineBasicBlock::iterator prevMi = prior(mi);
-          DOUT << "\t\tprepend:\t"; DEBUG(prevMi->print(std::cerr, &TM));
+          DOUT << "\t\tprepend:\t"; DEBUG(prevMi->print(*cerr.stream(), &TM));
 
           // Update live variables for regA
           LiveVariables::VarInfo& varInfo = LV.getVarInfo(regA);
           varInfo.DefInst = prevMi;
 
-          // update live variables for regB
           if (LV.removeVirtualRegisterKilled(regB, mbbi, mi))
             LV.addVirtualRegisterKilled(regB, prevMi);
 
@@ -220,7 +215,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
         mi->getOperand(ti).setReg(mi->getOperand(si).getReg());
         MadeChange = true;
 
-        DOUT << "\t\trewrite to:\t"; DEBUG(mi->print(std::cerr, &TM));
+        DOUT << "\t\trewrite to:\t"; DEBUG(mi->print(*cerr.stream(), &TM));
       }
     }
   }