#include "VirtRegMap.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "llvm/CodeGen/LiveStackAnalysis.h"
+#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/raw_ostream.h"
using namespace llvm;
/// Ensures there is space before the given machine instruction, returns the
/// instruction's new number.
- unsigned makeSpaceBefore(MachineInstr *mi) {
+ MachineInstrIndex makeSpaceBefore(MachineInstr *mi) {
if (!lis->hasGapBeforeInstr(lis->getInstructionIndex(mi))) {
lis->scaleNumbering(2);
ls->scaleNumbering(2);
}
- unsigned miIdx = lis->getInstructionIndex(mi);
+ MachineInstrIndex miIdx = lis->getInstructionIndex(mi);
assert(lis->hasGapBeforeInstr(miIdx));
/// Ensure there is space after the given machine instruction, returns the
/// instruction's new number.
- unsigned makeSpaceAfter(MachineInstr *mi) {
+ MachineInstrIndex makeSpaceAfter(MachineInstr *mi) {
if (!lis->hasGapAfterInstr(lis->getInstructionIndex(mi))) {
lis->scaleNumbering(2);
ls->scaleNumbering(2);
}
- unsigned miIdx = lis->getInstructionIndex(mi);
+ MachineInstrIndex miIdx = lis->getInstructionIndex(mi);
assert(lis->hasGapAfterInstr(miIdx));
return miIdx;
}
-
/// Insert a store of the given vreg to the given stack slot immediately
/// after the given instruction. Returns the base index of the inserted
/// instruction. The caller is responsible for adding an appropriate
/// LiveInterval to the LiveIntervals analysis.
- unsigned insertStoreFor(MachineInstr *mi, unsigned ss,
- unsigned vreg,
- const TargetRegisterClass *trc) {
+ MachineInstrIndex insertStoreAfter(MachineInstr *mi, unsigned ss,
+ unsigned vreg,
+ const TargetRegisterClass *trc) {
- MachineBasicBlock::iterator nextInstItr(mi);
- ++nextInstItr;
+ MachineBasicBlock::iterator nextInstItr(next(mi));
- unsigned miIdx = makeSpaceAfter(mi);
+ MachineInstrIndex miIdx = makeSpaceAfter(mi);
tii->storeRegToStackSlot(*mi->getParent(), nextInstItr, vreg,
true, ss, trc);
- MachineBasicBlock::iterator storeInstItr(mi);
- ++storeInstItr;
+ MachineBasicBlock::iterator storeInstItr(next(mi));
MachineInstr *storeInst = &*storeInstItr;
- unsigned storeInstIdx = miIdx + LiveInterval::InstrSlots::NUM;
+ MachineInstrIndex storeInstIdx = lis->getNextIndex(miIdx);
assert(lis->getInstructionFromIndex(storeInstIdx) == 0 &&
"Store inst index already in use.");
return storeInstIdx;
}
- void insertStoreOnInterval(LiveInterval *li,
- MachineInstr *mi, unsigned ss,
- unsigned vreg,
- const TargetRegisterClass *trc) {
+ /// Insert a store of the given vreg to the given stack slot immediately
+ /// before the given instructnion. Returns the base index of the inserted
+ /// Instruction.
+ MachineInstrIndex insertStoreBefore(MachineInstr *mi, unsigned ss,
+ unsigned vreg,
+ const TargetRegisterClass *trc) {
+ MachineInstrIndex miIdx = makeSpaceBefore(mi);
+
+ tii->storeRegToStackSlot(*mi->getParent(), mi, vreg, true, ss, trc);
+ MachineBasicBlock::iterator storeInstItr(prior(mi));
+ MachineInstr *storeInst = &*storeInstItr;
+ MachineInstrIndex storeInstIdx = lis->getPrevIndex(miIdx);
+
+ assert(lis->getInstructionFromIndex(storeInstIdx) == 0 &&
+ "Store inst index already in use.");
+
+ lis->InsertMachineInstrInMaps(storeInst, storeInstIdx);
+
+ return storeInstIdx;
+ }
+
+ void insertStoreAfterInstOnInterval(LiveInterval *li,
+ MachineInstr *mi, unsigned ss,
+ unsigned vreg,
+ const TargetRegisterClass *trc) {
- unsigned storeInstIdx = insertStoreFor(mi, ss, vreg, trc);
- unsigned start = lis->getDefIndex(lis->getInstructionIndex(mi)),
- end = lis->getUseIndex(storeInstIdx);
+ MachineInstrIndex storeInstIdx = insertStoreAfter(mi, ss, vreg, trc);
+ MachineInstrIndex start = lis->getDefIndex(lis->getInstructionIndex(mi)),
+ end = lis->getUseIndex(storeInstIdx);
VNInfo *vni =
li->getNextValue(storeInstIdx, 0, true, lis->getVNInfoAllocator());
- vni->kills.push_back(storeInstIdx);
+ vni->addKill(storeInstIdx);
+ DEBUG(errs() << " Inserting store range: [" << start
+ << ", " << end << ")\n");
LiveRange lr(start, end, vni);
li->addRange(lr);
}
- /// Insert a load of the given veg from the given stack slot immediately
+ /// Insert a load of the given vreg from the given stack slot immediately
+ /// after the given instruction. Returns the base index of the inserted
+ /// instruction. The caller is responsibel for adding/removing an appropriate
+ /// range vreg's LiveInterval.
+ MachineInstrIndex insertLoadAfter(MachineInstr *mi, unsigned ss,
+ unsigned vreg,
+ const TargetRegisterClass *trc) {
+
+ MachineBasicBlock::iterator nextInstItr(next(mi));
+
+ MachineInstrIndex miIdx = makeSpaceAfter(mi);
+
+ tii->loadRegFromStackSlot(*mi->getParent(), nextInstItr, vreg, ss, trc);
+ MachineBasicBlock::iterator loadInstItr(next(mi));
+ MachineInstr *loadInst = &*loadInstItr;
+ MachineInstrIndex loadInstIdx = lis->getNextIndex(miIdx);
+
+ assert(lis->getInstructionFromIndex(loadInstIdx) == 0 &&
+ "Store inst index already in use.");
+
+ lis->InsertMachineInstrInMaps(loadInst, loadInstIdx);
+
+ return loadInstIdx;
+ }
+
+ /// Insert a load of the given vreg from the given stack slot immediately
/// before the given instruction. Returns the base index of the inserted
/// instruction. The caller is responsible for adding an appropriate
/// LiveInterval to the LiveIntervals analysis.
- unsigned insertLoadFor(MachineInstr *mi, unsigned ss,
- unsigned vreg,
- const TargetRegisterClass *trc) {
- MachineBasicBlock::iterator useInstItr(mi);
-
- unsigned miIdx = makeSpaceBefore(mi);
+ MachineInstrIndex insertLoadBefore(MachineInstr *mi, unsigned ss,
+ unsigned vreg,
+ const TargetRegisterClass *trc) {
+ MachineInstrIndex miIdx = makeSpaceBefore(mi);
- tii->loadRegFromStackSlot(*mi->getParent(), useInstItr, vreg, ss, trc);
- MachineBasicBlock::iterator loadInstItr(mi);
- --loadInstItr;
+ tii->loadRegFromStackSlot(*mi->getParent(), mi, vreg, ss, trc);
+ MachineBasicBlock::iterator loadInstItr(prior(mi));
MachineInstr *loadInst = &*loadInstItr;
- unsigned loadInstIdx = miIdx - LiveInterval::InstrSlots::NUM;
+ MachineInstrIndex loadInstIdx = lis->getPrevIndex(miIdx);
assert(lis->getInstructionFromIndex(loadInstIdx) == 0 &&
"Load inst index already in use.");
return loadInstIdx;
}
- void insertLoadOnInterval(LiveInterval *li,
- MachineInstr *mi, unsigned ss,
- unsigned vreg,
- const TargetRegisterClass *trc) {
+ void insertLoadBeforeInstOnInterval(LiveInterval *li,
+ MachineInstr *mi, unsigned ss,
+ unsigned vreg,
+ const TargetRegisterClass *trc) {
- unsigned loadInstIdx = insertLoadFor(mi, ss, vreg, trc);
- unsigned start = lis->getDefIndex(loadInstIdx),
- end = lis->getUseIndex(lis->getInstructionIndex(mi));
+ MachineInstrIndex loadInstIdx = insertLoadBefore(mi, ss, vreg, trc);
+ MachineInstrIndex start = lis->getDefIndex(loadInstIdx),
+ end = lis->getUseIndex(lis->getInstructionIndex(mi));
VNInfo *vni =
li->getNextValue(loadInstIdx, 0, true, lis->getVNInfoAllocator());
- vni->kills.push_back(lis->getInstructionIndex(mi));
+ vni->addKill(lis->getInstructionIndex(mi));
+ DEBUG(errs() << " Intserting load range: [" << start
+ << ", " << end << ")\n");
LiveRange lr(start, end, vni);
li->addRange(lr);
/// immediately before each use, and stores after each def. No folding is
/// attempted.
std::vector<LiveInterval*> trivialSpillEverywhere(LiveInterval *li) {
- DOUT << "Spilling everywhere " << *li << "\n";
+ DEBUG(errs() << "Spilling everywhere " << *li << "\n");
assert(li->weight != HUGE_VALF &&
"Attempting to spill already spilled value.");
assert(!li->isStackSlot() &&
"Trying to spill a stack slot.");
+ DEBUG(errs() << "Trivial spill everywhere of reg" << li->reg << "\n");
+
std::vector<LiveInterval*> added;
const TargetRegisterClass *trc = mri->getRegClass(li->reg);
regItr = mri->reg_begin(li->reg); regItr != mri->reg_end();) {
MachineInstr *mi = &*regItr;
+
+ DEBUG(errs() << " Processing " << *mi);
+
do {
++regItr;
} while (regItr != mri->reg_end() && (&*regItr == mi));
assert(hasUse || hasDef);
if (hasUse) {
- insertLoadOnInterval(newLI, mi, ss, newVReg, trc);
+ insertLoadBeforeInstOnInterval(newLI, mi, ss, newVReg, trc);
}
if (hasDef) {
- insertStoreOnInterval(newLI, mi, ss, newVReg, trc);
+ insertStoreAfterInstOnInterval(newLI, mi, ss, newVReg, trc);
}
added.push_back(newLI);
std::vector<LiveInterval*> intraBlockSplit(LiveInterval *li, VNInfo *valno) {
std::vector<LiveInterval*> spillIntervals;
- MachineBasicBlock::iterator storeInsertPoint;
+
+ if (!valno->isDefAccurate() && !valno->isPHIDef()) {
+ // Early out for values which have no well defined def point.
+ return spillIntervals;
+ }
+
+ // Ok.. we should be able to proceed...
+ const TargetRegisterClass *trc = mri->getRegClass(li->reg);
+ unsigned ss = vrm->assignVirt2StackSlot(li->reg);
+ vrm->grow();
+ vrm->assignVirt2StackSlot(li->reg, ss);
+
+ MachineInstr *mi = 0;
+ MachineInstrIndex storeIdx = MachineInstrIndex();
if (valno->isDefAccurate()) {
// If we have an accurate def we can just grab an iterator to the instr
// after the def.
- storeInsertPoint =
- next(MachineBasicBlock::iterator(lis->getInstructionFromIndex(valno->def)));
+ mi = lis->getInstructionFromIndex(valno->def);
+ storeIdx = lis->getDefIndex(insertStoreAfter(mi, ss, li->reg, trc));
} else {
- // If the def info isn't accurate we check if this is a PHI def.
- // If it is then def holds the index of the defining Basic Block, and we
- // can use that to get an insertion point.
- if (valno->isPHIDef()) {
-
- } else {
- // We have no usable def info. We can't split this value sensibly.
- // FIXME: Need sensible feedback for "failure to split", an empty
- // set of spill intervals could be reasonably returned from a
- // split where both the store and load are folded.
- return spillIntervals;
- }
+ // if we get here we have a PHI def.
+ mi = &lis->getMBBFromIndex(valno->def)->front();
+ storeIdx = lis->getDefIndex(insertStoreBefore(mi, ss, li->reg, trc));
+ }
+
+ MachineBasicBlock *defBlock = mi->getParent();
+ MachineInstrIndex loadIdx = MachineInstrIndex();
+
+ // Now we need to find the load...
+ MachineBasicBlock::iterator useItr(mi);
+ for (; !useItr->readsRegister(li->reg); ++useItr) {}
+
+ if (useItr != defBlock->end()) {
+ MachineInstr *loadInst = useItr;
+ loadIdx = lis->getUseIndex(insertLoadBefore(loadInst, ss, li->reg, trc));
+ }
+ else {
+ MachineInstr *loadInst = &defBlock->back();
+ loadIdx = lis->getUseIndex(insertLoadAfter(loadInst, ss, li->reg, trc));
}
-
+ li->removeRange(storeIdx, loadIdx, true);
return spillIntervals;
}
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